In this paper, we propose an improved SO-PMI (Semantic Orientation Using Pointwise Mutual Information) algorithm, for use in Japanese Weblog Opinion Mining. SO-PMI is an unsupervised approach proposed by Turney that has been shown to work well for English. When this algorithm was translated into Japanese naively, most phrases, whether positive or negative in meaning, received a negative SO. For dealing with this slanting phenomenon, we propose three improvements: to expand the reference words to sets of words, to introduce a balancing factor and to detect neutral expressions. In our experiments, the proposed improvements obtained a well-balanced result: both positive and negative accuracy exceeded 62%, when evaluated on 1,200 opinion sentences sampled from three different domains (reviews of Electronic Products, Cars and Travels from Kakaku.com). In a comparative experiment on the same corpus, a supervised approach (SA-Demo) achieved a very similar accuracy to our method. This shows that our proposed approach effectively adapted SO-PMI for Japanese, and it also shows the generality of SO-PMI.
Hernan AGUIRRE Masahiko SATO Kiyoshi TANAKA
In this paper, we propose δ-similar elimination to improve the search performance of multiobjective evolutionary algorithms in combinatorial optimization problems. This method eliminates similar individuals in objective space to fairly distribute selection among the different regions of the instantaneous Pareto front. We investigate four eliminating methods analyzing their effects using NSGA-II. In addition, we compare the search performance of NSGA-II enhanced by our method and NSGA-II enhanced by controlled elitism.
Bubble-sort graphs are variants of Cayley graphs. A bubble-sort graph is suitable as a topology for massively parallel systems because of its simple and regular structure. Therefore, in this study, we focus on n-bubble-sort graphs and propose an algorithm to obtain n-1 disjoint paths between two arbitrary nodes in time bounded by a polynomial in n, the degree of the graph plus one. We estimate the time complexity of the algorithm and the sum of the path lengths after proving the correctness of the algorithm. In addition, we report the results of computer experiments evaluating the average performance of the algorithm.
Hasitha Muthumala WAIDYASOORIYA Weisheng CHONG Masanori HARIYAMA Michitaka KAMEYAMA
Dynamically-programmable gate arrays (DPGAs) promise lower-cost implementations than conventional field-programmable gate arrays (FPGAs) since they efficiently reuse limited hardware resources in time. One of the typical DPGA architectures is a multi-context FPGA (MC-FPGA) that requires multiple memory bits per configuration bit to realize fast context switching. However, this additional memory bits cause significant overhead in area and power consumption. This paper presents novel architecture of a switch element to overcome the required capacity of configuration memory. Our main idea is to exploit redundancy between different contexts by using a fine-grained switch element. The proposed MC-FPGA is designed in a 0.18 µm CMOS technology. Its maximum clock frequency and the context switching frequency are measured to be 310 MHz and 272 MHz, respectively. Moreover, novel CAD process that exploits the redundancy in configuration data, is proposed to support the MC-FPGA architecture.
Masanobu TSURUTA Hiroyuki SAKAI Shigeru MASUYAMA
We propose a method of informative DOM subtree identification from a Web page in an unfamiliar Web site. Our method uses layout data of DOM nodes generated by a generic Web browser. The results show that our method outperforms a baseline method, and was able to identify informative DOM subtrees from Web pages robustly.
For a globally asynchronous locally synchronous (GALS) system, data transfer mechanisms based on a current-mode multiple valued logic (CMMVL) has been studied to reduce complexity and power dissipation of wires. However, these schemes consume considerable amount of power even in idle states because of the static power caused by their inherent structure. In this paper, new encoder and decoder circuits using CMMVL are suggested to reduce the static power. The effectiveness of the proposed data transfer is validated by comparisons with the previous CMMVL scheme and conventional voltage-mode schemes such as dual-rail and 1-of-4 encodings through simulation with a 0.25-µm CMOS technology. Simulation results demonstrate that the proposed CMMVL scheme significantly reduces power consumption of the previous one and is superior to dual-rail and 1-of-4 schemes over wire length of 2 mm and 4 mm, respectively.
The characteristics of two-stage composite right- and left-handed (CRLH) transmission lines are discussed. The dispersion relationship of both balanced and unbalanced two-stage CRLH lines is described, together with numerical calculations that demonstrate their potential.
Shiho HAGIWARA Takumi UEZONO Takashi SATO Kazuya MASU
Stochastic approaches for effective power distribution network optimization are proposed. Considering node voltages obtained using dynamic voltage drop analysis as sample variables, multi-variate regression is conducted to optimize clock timing metrics, such as clock skew or jitter. Aggregate correlation coefficient (ACC) which quantifies connectivity between different chip regions is defined in order to find a possible insufficiency in wire connections of a power distribution network. Based on the ACC, we also propose a procedure using linear regression to find the most effective region for improving clock timing metrics. By using the proposed procedure, effective fixing point were obtained two orders faster than by using brute force circuit simulation.
Huazhi GONG Kitae NAHM JongWon KIM
In IEEE 802.11 networks, the access point (AP) selection based on the strongest signal strength often results in the extremely unfair bandwidth allocation among mobile users (MUs). In this paper, we propose a distributed AP selection algorithm to achieve a fair bandwidth allocation for MUs. The proposed algorithm gradually balances the AP loads based on max-min fairness for the available multiple bit rate choices in a distributed manner. We analyze the stability and overhead of the proposed algorithm, and show the improvement of the fairness via computer simulation.
Yasuyuki NOGAMI Ryo NAMBA Yoshitaka MORIKAWA
This paper shows a necessary condition for type-
In this paper, we propose new external context features for the semantic classification of bio-entities. In the previous approaches, the words located on the left or the right context of bio-entities are frequently used as the external context features. However, in our prior experiments, the external contexts in a flat representation did not improve the performance. In this study, we incorporate predicate-argument features into training the ME-based classifier. Through parsing and argument identification, we recognize biomedical verbs that have argument relations with the constituents including a bio-entity, and then use the predicate-argument structures as the external context features. The extraction of predicate-argument features can be done by performing two identification tasks: the biomedically salient word identification which determines whether a word is a biomedically salient word or not, and the target verb identification which identifies biomedical verbs that have argument relations with the constituents including a bio-entity. Experiments show that the performance of semantic classification in the bio domain can be improved by utilizing such predicate-argument features.
Kazuyasu MIZUSAWA Naoya ONIZAWA Takahiro HANYU
This paper presents a design of an asynchronous peer-to-peer half-duplex/full-duplex-selectable data-transfer system on-chip interconnected. The data-transfer method between channels is based on a 1-phase signaling scheme realized by using multiple-valued current-mode (MVCM) circuits and encoding, which performs high-speed communication. A data transmission is selectable by adding a mode-detection circuit that observes data-transmission modes; full-duplex, half-duplex and standby modes. Especially, since current sources are completely cut off during the standby mode, the power dissipation can be greatly reduced. Moreover, both half-duplex and full-duplex communication can be realized by sharing a common circuit except a signal-level conversion circuit. The proposed interface is implemented using 0.18-µm CMOS, and its performance improvement is discussed in comparison with those of the other ordinary asynchronous methods.
Jeong-Yong AHN Kill-Sung MUN Young-Hyun KIM Sun-Young OH Beom-Soo HAN
In this note we propose a fuzzy diagnosis of headache. The method is based on the relations between symptoms and diseases. For this purpose, we suggest a new diagnosis measure using the occurrence information of patient's symptoms and develop an improved interview chart with fuzzy degrees assigned according to the relation among symptoms and three labels of headache. The proposed method is illustrated by two examples.
A packet detection method for zero-padded orthogonal frequency division multiplexing (OFDM) transmission is presented. The proposed algorithm effectively conducts packet detection by employing both an M-sample time delayed cross correlation value, and a received signal power calculated by using the received input samples corresponding to the zero padding (ZP) intervals or less.
Supaporn KIATTISIN Kosin CHAMNONGTHAI
Bone Mineral Density (BMD) is an indicator of osteoporosis that is an increasingly serious disease, particularly for the elderly. To calculate BMD, we need to measure the volume of the femur in a noninvasive way. In this paper, we propose a noninvasive bone volume measurement method using x-ray attenuation on radiography and medical knowledge. The absolute thickness at one reference pixel and the relative thickness at all pixels of the bone in the x-ray image are used to calculate the volume and the BMD. First, the absolute bone thickness of one particular pixel is estimated by the known geometric shape of a specific bone part as medical knowledge. The relative bone thicknesses of all pixels are then calculated by x-ray attenuation of each pixel. Finally, given the absolute bone thickness of the reference pixel, the absolute bone thickness of all pixels is mapped. To evaluate the performance of the proposed method, experiments on 300 subjects were performed. We found that the method provides good estimations of real BMD values of femur bone. Estimates shows a high linear correlation of 0.96 between the volume Bone Mineral Density (vBMD) of CT-SCAN and computed vBMD (all P<0.001). The BMD results reveal 3.23% difference in volume from the BMD of CT-SCAN.
Motion-compensated frame interpolation (MCFI) is widely used to smoothly display low frame rate video sequences by synthesizing and inserting new frames between existing frames. The temporal shift interpolation technique (TSIT) is popular for frame interpolation of video sequences that are encoded by a block-based video coding standard such as MPEG-4 or H.264/AVC. TSIT assumes the existence of a motion vector (MV) and may not result in high-quality interpolation for intra-mode blocks that do not have MVs. This paper proposes a new frame interpolation algorithm mainly designed for intra-mode blocks. In order to improve the accuracy of pixel interpolation, the new algorithm proposes sub-pixel interpolation and the reuse of MVs for their refinement. In addition, the new algorithm employs two different interpolation modes for inter-mode blocks and intra-mode blocks, respectively. The use of the two modes reduces ghost artifacts but potentially increases blocking effects between the blocks interpolated by different modes. To reduce blocking effects, the proposed algorithm searches the boundary of an object and interpolates all blocks in the object in the same mode. Simulation results show that the proposed algorithm improves PSNR by an average of 0.71 dB compared with the TSIT with MV refinement and also significantly improves the subjective quality of pictures by reducing ghost artifacts.
Ultra fast switching speed of superconducting digital circuits enable realization of Digital Signal Processors with performance unattainable by any other technology. Based on rapid-single-flux technology (RSFQ) logic, these integrated circuits are capable of delivering high computation capacity up to 30 GOPS on a single processor and very short latency of 0.1 ns. There are two main applications of such hardware for practical telecommunication systems: filters for superconducting ADCs operating with digital RF data and recursive filters at baseband. The later of these allows functions such as multiuser detection for 3G WCDMA, equalization and channel precoding for 4G OFDM MIMO, and general blind detection. The performance gain is an increase in the cell capacity, quality of service, and transmitted data rate. The current status of the development of the RSFQ baseband DSP is discussed. Major components with operating speed of 30 GHz have been developed. Designs, test results, and future development of the complete systems including cryopackaging and CMOS interface are reviewed.
Hirofumi YAMAMOTO Eiichiro SUMITA
We propose a domain specific model for statistical machine translation. It is well-known that domain specific language models perform well in automatic speech recognition. We show that domain specific language and translation models also benefit statistical machine translation. However, there are two problems with using domain specific models. The first is the data sparseness problem. We employ an adaptation technique to overcome this problem. The second issue is domain prediction. In order to perform adaptation, the domain must be provided, however in many cases, the domain is not known or changes dynamically. For these cases, not only the translation target sentence but also the domain must be predicted. This paper focuses on the domain prediction problem for statistical machine translation. In the proposed method, a bilingual training corpus, is automatically clustered into sub-corpora. Each sub-corpus is deemed to be a domain. The domain of a source sentence is predicted by using its similarity to the sub-corpora. The predicted domain (sub-corpus) specific language and translation models are then used for the translation decoding. This approach gave an improvement of 2.7 in BLEU score on the IWSLT05 Japanese to English evaluation corpus (improving the score from 52.4 to 55.1). This is a substantial gain and indicates the validity of the proposed bilingual cluster based models.
Masayuki ARAI Satoshi FUKUMOTO Kazuhiko IWASAKI
Convolutional compactors offer a promising technique of compacting test responses. In this study we expand the architecture of convolutional compactor onto a Galois field in order to improve compaction ratio as well as reduce X-masking probability, namely, the probability that an error is masked by unknown values. While each scan chain is independently connected by EOR gates in the conventional arrangement, the proposed scheme treats q signals as an element over GF(2q), and the connections are configured on the same field. We show the arrangement of the proposed compactors and the equivalent expression over GF(2). We then evaluate the effectiveness of the proposed expansion in terms of X-masking probability by simulations with uniform distribution of X-values, as well as reduction of hardware overheads. Furthermore, we evaluate a multi-weight arrangement of the proposed compactors for non-uniform X distributions.
Fawnizu Azmadi HUSSIN Tomokazu YONEDA Alex ORAILOLU Hideo FUJIWARA
This paper proposes a test methodology for core-based testing of System-on-Chips by utilizing the functional bus as a test access mechanism. The functional bus is used as a transportation channel for the test stimuli and responses from a tester to the cores under test (CUT). To enable test concurrency, local test buffers are added to all CUTs. In order to limit the buffer area overhead while minimizing the test application time, we propose a packet-based scheduling algorithm called PAcket Set Scheduling (PASS), which finds the complete packet delivery schedule under a given power constraint. The utilization of test packets, consisting of a small number of bits of test data, for test data delivery allow an efficient sharing of bus bandwidth with the help of an effective buffer-based test architecture. The experimental results show that the methodology is highly effective, especially for smaller bus widths, compared to previous approaches that do not use the functional bus.