The purpose of this paper is to derive a novel fractionally spaced Bayesian decision feedback equalizer (FS-BDFE). The oversampling technique changes single input single output (SISO) linear channel to single input multiple output (SIMO) linear channel. The Bayesian decision variable in the FS-BDFE is defined as the product of Bayesian decision variables in the Bayesian decision feedback equalizers (BDFE) corresponding to each channels of the SIMO. It can be shown that the FS-BDFE has less decision error probability than the conventional BDFE. The effectiveness of the proposed equalizer is also demonstrated by the computer simulation.

This paper discusses two types of polyphase sequence sets, which will successfully provide CDMA systems without co-channel interference. One is a type of ZCZ sets, whose periodic auto-correlation functions take zero at continuous shifts on both side of the zero-shift, and periodic cross-ones also take zero at the continuous shifts and the zero-shift. The other is a new type of sets consisting of some subsets of polyphase sequences with zero cross-correlation zone, called ZCCZ sets, whose periodic cross-correlation functions among different subsets have take zero at continuous shifts on both side of the zero-shift including the zero-shift. The former can achieve a mathematical bound, and the latter can have large size.

This paper describes a rhythm pattern accuracy diagnosis system based on the rhythm pattern matching algorithm and a diagnosis feedback method by employing the SVM technique. A beat rhythm pattern is recorded by a PC and analyzed with an algorithm including cluster-analysis-based pattern matching. Rhythm performance is represented by a performance feature vector, which features note length deviation, note length instability, and tempo instability. The performance feature vector is effective for objectively evaluating the accuracy of rhythm patterns objectively. In addition, this system has the music experts' knowledge base, which is calculated from the performance feature vectors associated with the experts' subjective evaluation by listening to the performance. The system generates both an objective measuring report, and experts' comments for learners. Reproductivity of experts' comments is statistically indicated to be excellent for eight rhythm patterns, two tempo levels, and eight users. Reliability of experts' comments are also described considering the threshold of the decision function of SVM. Subjective evaluation of the system is carried out by fifteen users by a questionnaire using the SD method. As a result of factor analysis for the sixteen questions, four factors named "Audio-visual representation," "User-friendliness," "Reliability," and "Window representation," are extracted. Users' four factor scores indicate that the system is reliable and easy to use.

This paper presents an effective approach for estimating of the load matching conditions for dielectric barrier discharge (DBD) load. By the simulation method proposed here, optimal working frequency and optimal applied voltage for driving of DBD load can be calculated. Estimation results for the DBD ultraviolet generation lamp as a load of series resonant inverter are presented here, together with their evaluations.

The adaptive phase tracking scheme for orthogonal frequency division multiplexing (OFDM) signals can provide superior PER performance in channels with varying phase noise power. It is an effective technique for achieving high-rate and high quality wireless transmission. This paper proposes a new simple adaptive phase tracking scheme for OFDM signals in order to realize high-rate wireless local area networks (LANs). The proposed scheme measures the integrated phase rotation in order to appropriately set the properties of the FIR filter in the phase tracking circuits. This scheme uses the fact that the integrated phase rotation is correlated to the phase noise power. Assuming an RMS delay spread of 100 ns, computer simulations show that the proposed scheme offers superior required Eb/N0 performance (with regard to the phase noise power) compared to the conventional fixed-tap scheme, where the phase noise to signal power ratios are below -18 dB. It also offers excellent PER performance at the packet length of 1000 bytes unlike the conventional schemes, which suffer degraded PER performance.

This paper describes fully integrated active guard band filters for suppressing the substrate coupling noise and their noise suppression effect measured by test chip experiments. The noise cancellation circuit of the active guard band filters simply consists of an inverter and a source follower. The substrate noise suppression effect was measured by using a test chip fabricated in a 0.18 µm CMOS triple-well process for system-on-a-chip. The noise with the filter was less than 5% of that without the filter and the noise suppression effect was observed from 1 MHz to 200 MHz by the statistical measurement of the voltage comparator. The noise suppression effect was also observed for actual digital switching noise produced by digital inverters. Configuration of the active guard band filter was investigated by simulation and it is shown that high and uniform noise suppression effect is achieved by placing the guard bands in the L-shape around the target triple-well area on the p-substrate.

In order to realize a future seamless high-speed road-vehicle communication system, we have proposed using code division multiplexing (CDM) radio transmission scheme by using cyclic shifted-and-extended (CSE) codes as spread codes. As the CSE codes are generated by cyclically shifting and extending a conventionally used code, the number of codes generated from a code is limited to the length of the shift interval and the tolerable period of delayed waves also depends on the length. In this paper, based on CSE codes, we propose a method to minimize the length of the shift interval and a cancellation technique with a simple calculation in order to eliminate the interference from delayed waves caused by the reduction of the length of shift interval. The concept and the BER performances in AWGN, two-paths, and multi-path fading environments are described in this paper. As a result, the maximum transmission rate of CSE-based-CDM transmission per one-code using the newly proposed transmission scheme is 3 times as large as that using conventional CSE codes and DQPSK-CDM transmission scheme.

This paper provides an overview on efficient algorithms for multicasting in optical networks supported by Wavelength Division Multiplexing (WDM) with limited wavelength conversion. We classify the multicast problems according to off-line and on-line in both reliable and unreliable networks. In each problem class, we present efficient algorithms for multicast and multiple multicast and show their performance. We also present efficient schemes for dynamic multicast group membership updating. We conclude the paper by showing possible extension of the presented algorithms for QoS provision.

Interference Cancellation (IC) receivers can be used in CDMA cellular systems to improve the capacity. The IC receivers can be divided into two main categories, Single-User Detectors (SUD) and Multi-User Detectors (MUD). They have different characteristics in terms of intra-cell and inter-cell interference cancellation ability. In this paper we propose two new IC receivers that combines the properties of SUD and MUD receivers. The first one is a Serial IC receiver followed by the Normalized Griffiths' algorithm (SING). The second one is an Integrated Serial IC and Normalized Griffiths' algorithm (iSING). We first compare their basic single-cell performance with the conventional RAKE receiver, the Serial IC and the Normalized Griffiths' Algorithm. Next, we examine their multi-cell performance by doing multi-cell link-level simulations. The results show that even though the Serial IC receiver has good single-cell performance, the proposed receivers have as much as 35-40% higher capacity than the Serial IC receiver in the multi-cell case under the ideal conditions assumed in this paper.

In wireless communication systems, low-power metrics is becoming a burdensome problem in the portable terminal design, because of portability constraints. This paper presents design architecture of a low-power Digital Matched Filter (DMF) for the direct-sequence spread-spectrum communication system such as WCDMA or wireless LAN. The proposed approach for power savings focuses on the architecture of the reception registers and the correlation-calculating unit, which dissipate the majority of the power in a DMF. The main features are asynchronous latch clock generation for the reception registers, parallelism of correlation calculation operations and bit manipulation for chip-correlation operations. A DMF is designed in compliance with the WCDMA specifications incorporating the proposed techniques, and its properties are evaluated by computer simulations at the gate level using 0.18-µm CMOS standard cell array technology. As a result, the power consumption of the proposed DMF is estimated to be 9.3 mW (@15.6 MHz, 1.6 V), which is below 40% of the power consumed by a general DMF.

16-bit Asian language codes can not be compressed well by conventional 8-bit sampling text compression schemes. Previously, we reported the application of a word-based text compression method that uses 16-bit sampling for the compression of Japanese texts. This paper describes our further efforts in applying a word-based method with a static canonical Huffman encoder to both Japanese and Chinese texts. The method was proposed to support a multilingual environment, as we replaced the word-dictionary and the canonical Huffman code table for the respective language appropriately. A computer simulation showed that this method is effective for both languages. The obtained compression ratio was a little less than 0.5 without regarding the Markov context, and around 0.4 when accounting for the first order Markov context.

OPKFDDs (Ordered Pseudo-Kronecker Functional Decision Diagrams) are a data structure that provides compact representation of Boolean functions. The size of OPKFDDs depends on a variable ordering and on decomposition type choices. Finding an optimal representation is very hard and the size of the search space is n! 32n-1, where n is the number of input variables. To overcome the huge search space of the problem, a genetic algorithm is proposed for the generation of OPKFDDs with minimal number of nodes.

Higher-order harmonics and distortions generated by nonlinearity of capacitance-voltage characteristic of a single varactor and an anti-series-connected varactor pair are analyzed and compared. The effect of linear and parabolic terms of nonlinearity to harmonics outputs and distortions is discussed. It is shown that an anti-series-connected varactor pair has a completely suppressed linear term and reduced parabolic term. The advantage of an anti-series-connected varactor pair is theoretically explained.

We demonstrated apertureless scanning near-field optical microscopy using a small protrusion (a simple 500-nm-diameter polystyrene particle) on a flat glass substrate as a probe. We designed a small sample stage to operate with the particle probe. It is a 40-µm-diameter circular stage, fabricated from an optical fiber by Hydrofluoric acid (HF) etching. In this paper, we present the first atomic force microscope and scanning near-field optical microscope images obtained with such a probe. We also discuss schemes for probe-sample distance control in this novel form of apertureless scanning near-field optical microscopy.

As a design flow for low-power FPGA implementation, Datapath-Layout-Driven Design (DLDD) has been proposed. This letter reports the effect of DLDD for standard-cell-based ASIC implementation, and proposes necessary improvements. Experimental results shows that about 8.3% reduction of power dissipation is achieved in the best case.

This paper considers a reconfiguration problem on a processor array model based on single-and-half-track switches, which is proposed for a fault tolerance technique at the fabrication time. The focus of this paper is to achieve the optimal reconfigurability, which means that whenever there exists a solution for successful reconfiguration, the designed method can find the solution. The paper consists of two parts. In the first part, we show two essential constraints that have been assumed in most of the previous studies, and make four reconfiguration classes that differ in the assumed essential constraints. Then, we present some inclusion relations among the four reconfiguration classes. As a result, it becomes clear that the most restrictive class including most of the previous methods never achieves the truly optimal reconfigurability. In the second part, we present a reconfiguration method based on sequential routing (RMSR). Although the worst-case time complexity of the RMSR is exponential in the number of processing elements, the reconfigurability of the RMSR is optimal within the most restrictive reconfiguration class. The effectiveness of the RMSR is shown by a computer simulation.

This paper describes high power density and low distortion characteristics of a novel InGaP channel field-modulating plate FET (InGaP FP-FET) under high voltage operation of over 50 V. The developed InGaP FP-FET exhibited an extremely high breakdown voltage of 100 V with an impact ionization coefficient about 103 times smaller than that of GaAs. These superior breakdown characteristics indicate that the InGaP FP-FET is one of the most desirable device structures for high-voltage high-power operation. The InGaP FP-FET delivered an output power density of 1.6 W/mm at 1.95 GHz operated at a drain bias voltage of 55 V. As power operation moves from class A to class AB, both 3rd-order intermodulation distortion (IM3) and power-added efficiency (PAE) at higher output-power region were improved, resulting from a suppressed gate leakage current near the power saturation point. These results promise that the developed InGaP FP-FET is suited for applications in which both high efficiency and low distortion are required.

2-Factor covering designs, a type of combinatorial designs, have recently received attention since they have industrial applications including software testing. For these applications, even a small reduction on the size of a design is significant, because it directly leads to the reduction of testing cost. In this letter, we report ten new designs that we constructed, which improve on the previously best known results.

In this paper, a VLSI architecture for lifting-based discrete wavelet transform (LDWT) is presented. Our architecture folds the computations of all resolution levels into the same low-pass and high-pass units to achieve higher hardware utilization. Due to the regular and flexible structure of the design, its area is independent of the length of the 1-D input sequence, and its latency is independent of the number of resolution levels. For the computations of analysis process of N-sample 1-D 3-level LDWT, our design takes about N clock cycles and requires 2 multipliers, 4 adders, and 22 registers. It is fabricated with TSMC 0.35-µm cell library and has a die size of 1.21.2 mm2. The power dissipation of the chip is about 0.4 W at the clock rate of 80 MHz.

An attempt to derive the lethal dose for mice was made at 2.45 GHz for whole body exposure. Based on a numerical dosimetry result and an experimental death rate investigation, the lethal dose was estimated to be a whole body averaged specific absorption rate (SAR) with a level at double the mouse's basal metabolic rate.