Emerging requirement for higher rate data services and better spectrum efficiency is the main driving force identified for the third generation mobile radio systems. Moreover, it needs the capability of providing predictable qualities of service (QoS) for different applications. To maintain different QoS requirements, mechanisms such as call admission control (CAC) and load control, etc. are needed to achieve the required services. In this paper, we propose a CAC algorithm based on channel assignment in a multi-chip rate direct-sequence CDMA (MCR-DS-CDMA) cellular system supporting multi-rate services. Five multi-MBC (mapping of information bit rates to chip rates) channel assignment schemes and corresponding channel selection rules are proposed herein. Computer simulation, where multimedia applications are considered, is used to evaluate the system performance (e.g., blocking probability and system capacity) with different channel assignment schemes. Numerical results demonstrate that scheme 5 (i.e., Minimum-influence scheme) performs better because it provides the highest system capacity and least blocking probability.

The pre-Rake system is known as a technique in TDD DS/CDMA system to reduce the mobile complexity and achieve the same BER performance like Rake receiver. The pre-Rake system itself is not optimum, since the channel impulse responses of uplink and downlink are slightly different in TDD system, so the signal- to-noise ratio (SNR) can be maximized with a matched filter based Rake receiver, which has not been considered in the conventional pre-Rake system. Furthermore pre-Rake system is sensitive to the Doppler frequency. Even though the pre-Rake system has the ability to suppress other user interference, it is not efficient to maximize the received signal in high Doppler frequency. However, Rake combiner is utilized for the detection method in our proposed system. So the maximized signal can keep the orthogonality better than the pre-Rake system and our proposed system can compensate the Doppler frequency effect. From these reasons, our system achieves better BER performance than that of the pre-Rake system with increasing the number of users in high Doppler frequency.

It has been established that the criteria for space-time convolutional code (STCC) are based on the maximization of the minimum rank and the minimum determinant of distance matrix over quasistatic flat Rayleigh fading channel. This letter presents a new criterion, i.e., modified trace criterion which maximizes both the minimum trace and the average trace of distance matrix for a new STCC. A new STCC is systematically searched so as to maximize the minimum trace and the average trace, and shown to be superior to other known codes in quasistatic flat Rayleigh fading channel.

This paper presents an architecture for a table-lookup (TLU) engine that allows the real-time operation of complicated TLU for telecommunications, such as the longest prefix match (LPM) and the long-bit match in packet classification. The engine consists of many CAM (Content Addressable Memory) chips, which are classified into several groups. When actual TLU is performed, the entries in each CAM group are searched simultaneously, and the best entry candidate in each group is selected by an intra-group arbiter. The final output, the entry desired, is decided by an inter group arbiter that selects one group. This hierarchical structure of arbitration is the key to the scalability of the engine. To accelerate the operation speed of the engine, we introduce a novel mechanism called "hit-flag look-ahead" that sends a hit-flag signal from each matched CAM chip to the inter group arbiter before each intra group arbiter calculates the best CAM output in the group. We show that a TLU engine based on the above architecture achieves significantly fast performance compared to engines based on conventional techniques, especially in the case of a large number of entries with long-bit matching. Furthermore, our architecture can realize an 33.3 Mlps (lookups per second) within a 128 bit 300,000-entry table at wire speed.

Interpolation surfaces, such as Bezier or B-spline surface, are usually used for representing smooth man-made objects and provide an excellent ability to control the shape of a surface by intuitively moving control points. In contrast, the fractal technique is used for creating various complex shapes, mainly of natural objects, that have self-similarity using simple procedures. We have proposed the "wrinkly surface (WR surface)" for combining the advantages of interpolation surfaces and fractals. In this paper, we propose the expansion of the construction scheme of the WR surface to irregular meshes. Control points of a WR surface are interpolated using the "Iterated Shuffle Transformation (IST)." Therefore, in order to achieve the expansion, we first generalize the IST on code spaces, and then propose multi-dimensional IST defined on geometric spaces. By creating various shape model examples, we demonstrate the usefulness of the WR surface as a modeling tool.

In this paper, we present a new soft-decision iterative decoding algorithm using an efficient minimum distance search (MDS) algorithm. The proposed MDS algorithm is a top-down and recursive MDS algorithm, which finds a most likely codeword among the codewords at the minimum distance of the code from a given codeword. A search is made in each divided section by a "call by need" from the upper section. As a consequence, the search space and computational complexity are reduced significantly. The simulation results show that the proposed decoding algorithm achieves near error performance to the maximum likelihood decoding for any RM code of length 128 and suboptimal for the (256, 37), (256, 93) and (256, 163) RM codes.

This paper presents a method for disambiguating word senses in Korean-Japanese machine translation by using a language independent ontology. This ontology stores semantic constraints between concepts and other world knowledge, and enables a natural language processing system to resolve semantic ambiguities by making inferences with the concept network of the ontology. In order to acquire a language-independent and reasonably practical ontology in a limited time and with less manpower, we extend the existing Kadokawa thesaurus by inserting additional semantic relations into its hierarchy, which are classified as case relations and other semantic relations. The former can be obtained by converting valency information and case frames from previously-built electronic dictionaries used in machine translation. The latter can be acquired from concept co-occurrence information, which is extracted automatically from a corpus. In practical machine translation systems, our word sense disambiguation method achieved an improvement of average precision by 6.0% for Japanese analysis and by 9.2% for Korean analysis over the method without using an ontology.

The EB tester line delay fault localization algorithm for combinational circuits is proposed where line delay fault probabilities are utilized to narrow fault candidates down to one efficiently. Probabilities for two main causes of line delay faults, defects of contact/vias along interconnections and crosstalk, are estimated through layout analysis. The algorithm was applied to 8 kinds of ISCAS'85 benchmark circuits to evaluate its performance where the guided probe (GP) diagnosis was used as the reference method. The proposed method can cut the number of probed lines to about 30% in average compared with those for the GP method. The total fault localization time was 31% of the time for the GP method and was 6% less than that of our previous method where the fault list generated in concurrent fault simulation is utilized.

The interaction between slider, lubricant and disk surface is becoming the most crucial robustness concern of advanced data storage systems. This paper reports comparative studies among various techniques for the measurement of head-disk spacing. It is noticed that the triple harmonic method gives a reading much closer to the reading of the head-disk spacing obtained optically at on-track center case, comparing with the PW50 method. Specially prepared disks with different carbon overcoat thickness (6.5 nm, 11 nm, 16 nm and 22 nm) were also used to study the reliability and repeatability of the triple harmonic method.

Write linear density limit is defined to analyze the magnetic recording process in computer hard disk drives at extremely high recording densities. The digital data with pseudo random sequences are recorded numerically in longitudinal media at different densities by a micromagnetic simulation model. A thin film write head and an ideal GMR read head are utilized in the record and read-back process, respectively. A novel method has been utilized to study the write linear density limit: the simulated read back voltage and the respected linear superposed pulses are compared to find the distortion in the record process. When a severe distortion shows up, the corresponding linear density is considered as the write linear density limit. By the novel method, the write linear density limit is analyzed with different parameters of the recording media.

This paper presents a multiple-valued logic-in-memory circuit with real-time programmability. The basic component, in which a dynamic storage function and a multiple-valued threshold function are merged, is implemented compactly by using charge storage and capacitive coupling with a DRAM-cell-based circuit structure under a 0.8-µm CMOS technology. The pass-transistor network using these basic components makes it possible to realize any multiple-valued-inputs binary-outputs logic circuits compactly. As a typical example, a fully parallel multiple-valued magnitude comparator is also implemented by using the proposed DRAM-cell-based pass-transistor network. Its execution time and power dissipation are reduced to about 11 percent and 29 percent, respectively, in comparison with those of a corresponding binary implementation. A prototype chip is also fabricated to confirm the basic operation of the proposed DRAM-cell-based logic-in-memory circuit.

In this paper, a method is proposed to construct an n-out-of-n visual secret sharing scheme for gray-scale images, for short an (n,n)-VSS-GS scheme, which is optimal in the sense of contrast and pixel expansion, i.e., resolution. It is shown that any (n,n)-VSS-GS scheme can be constructed based on the so-called polynomial representation of basis matrices treated in [15],[16]. Furthermore, it is proved that such construction can attain the optimal (n,n)-VSS-GS scheme.

The transient phenomenon of electromagnetic waves caused by a time dependent resistive screen in a waveguide is treated by using Wiener-Hopf technique. A boundary-value problem is formulated to describe the phenomenon, in which the resistivity of screen varies from infinite to zero in dependence on time. Application of the Fourier transformation with respect to time derives a Wiener-Hopf equation, which is solved by a commonly known decomposition procedure. The transient field is derived from the solution of the equation in terms of the Fourier inverse transform. By using the incomplete Lipschitz-Hankel integral for the computation of the field, numerical examples are given and the transient phenomenon is discussed.

Test compression/decompression is an efficient method for reducing the test application cost. In this paper we propose a test generation method for obtaining test-patterns suitable to test compression by statistical coding. In general, an ATPG generates a test-pattern that includes don't-care values. In our method, such don't-care values are specified based on an estimation of the final probability of 0/1 occurrence in the resultant test set. Experimental results show that our method can generate test patterns that are able to be highly compressed by statistical coding, in small computational time.

As two simple relaxation oscillators are coupled by periodical and instantaneous switching, the system exhibits rich superstable synchronous phenomena. In order to analyze the phenomena, we derive a hybrid return map of real and binary variables; and give theoretical results for (1) superstability of the synchronous phenomena and (2) period of the synchronous phenomena as a function of the parameters. Using a simple test circuit, typical phenomena are verified in the laboratory.

Metal particulate tape is one of the most advanced tape media to offer excellent performance at high recording densities. An accurate micromagnetic model of the metal particulate tape has been developed to analyze the magnetic properties of MP tapes. Both particle size distributions and orientation distribution are included in the model, and the magnetostatic interactions among particles are accurately calculated with the shape of ellipsoids. A partial mean field approximation applied in the calculation is proved to be effective by M-H loop analysis.

A debug system for heterogeneous multiple processors in a single chip has been developed. The system consists of the debug interface circuit integrated on the chip, the interface circuit board between the chip and PC, and the debug software implemented on a PC. This debug system has been designed for a multimedia communication processor, which includes an original video processor core, a RISC processor, and a DSP. The RISC processor controls the Video Processing Unit that includes an original video processor and other hardware functions. While in debug mode, the external debugger can control the Video Processing Unit in the same manner as the RISC processor. The JTAG based interface circuit contains registers for bus transaction for command, address, and data to be written, etc. and a bus transaction sequencer. In fact, this system can realize the same bus transaction control as the RISC processor's. By applying proposed debug system, simultaneous debug of the RISC Processing Unit and the Video Processing Unit can be realized. This allows problems to be investigated more quickly and the total time required for debugging is efficiently reduced. Without this technology an estimated 19 weeks is required to debug the chip, whereas use of this technology allowed debugging to be completed in 9 weeks.

In this paper we propose two diagnosis methods for crosstalk-induced pulse faults in sequential circuits using crosstalk fault simulation. These methods compare observed responses and simulated values at primary outputs to identify a set of suspected faults that are consistent with the observed responses. The first method is a restart-based method which determines the suspected fault list by using the knowledge about the first and last failures of the test sequence. The advantage of the restart-based method over a method using full simulation is its reduction of the number of simulated faults in a process of diagnosing faults. The second method is a resumption-based method which uses stored state information. The advantage of the resumption-based method over the restart-based method is its reduction of the CPU time for diagnosing the faults. The effectiveness of the proposed methods is evaluated by experiments conducted on ISCAS '89 benchmark circuits. From the experimental results we show that the number of suspected faults obtained by our methods is sufficiently small, and the resumption-based method is substantially faster than the restart-based method.

This paper presents an optimum antenna diversity combining method associated with despreading that employs Minimum Mean Square Error (MMSE) combining over the frequency domain in a frequency-selective fading channel for forward link Orthogonal Frequency and Code Division Multiplexing (OFCDM) wireless access, in order to achieve the maximum radio link capacity. Simulation results considering various propagation channel conditions elucidate that the antenna diversity combining method with Equal Gain Combining (EGC) subsequent to the despreading employing MMSE combining based on pilot symbol-assisted channel estimation and interference power estimation can decrease the required average received signal energy per bit-to-background noise power spectrum density ratio (Eb/N0) the most, taking into account the impact of the inter-code interference. Furthermore, we clarify that the required average received Eb/N0 for the average packet error rate of 10-2 employing the diversity combining scheme with EGC after despreading with MMSE combining is improved by approximately 0.3 dB compared to the diversity combining scheme with EGC before despreading with MMSE combining at the number of code-multiplexing of 24 for the spreading factor of 32 in a 24-path Rayleigh fading channel.

In this paper, we propose and evaluate a new channel assignment scheme for a micro-cellular network integrating data and conversational services. The channel assignment scheme combines handover processing depending on terminal speed with a preemptive scheme. High-speed terminals take over the channels of data terminals upon entering a full cell, while the data terminals are put in a queue until new resources are available. Simulating several variations of the scheme, allowing both fast moving data and voice terminals to preempt data terminals yielded the best result. Suspension time for fast moving data terminals was reduced dramatically, reducing the disadvantage caused by a high number of handovers. The cost was a small increase in blocking probability for new terminals.