In this paper, we propose a transmission method of the synchronized streaming data in digital broadcasting environment. The ancillary data that is used in the data broadcasting can be classified into three types: asynchronous, synchronous, and synchronized data. While the transmission of the asynchronous data is very simple, that of the synchronous or synchronized data is more complex because the synchronous and the synchronized data have time information for the presentation. Inaccurate transmission time without regarding the presentation time for the synchronous or synchronized data can cause a buffer overflow or delayed reception of a data in the receiver. Therefore, we propose a method to calculate the accurate transmission time of the synchronized data by using the MPEG-2 Program Clock Reference (PCR) and the Presentation Time Stamp (PTS) of the synchronized data. To verify the proposed method, we make an MPEG-2 Transport Stream (TS) by multiplexing the synchronized data with an A/V program based on the proposed method, and then analyze the multiplexed MPEG-2 TS. Also, the screen shots of the displayed synchronized data are presented in the receiver.

Packet loss is a serious problem due to the shortage of optical buffers in all-optical packet switched networks. In order to reduce packet losses, a dynamic routing method called 'deflection routing' has been proposed. Deflection routing, however, requires an optical switch to modify routing tables and packet labels for overflowing packets, so this routing method may also lead to other implementation problems in packet routing and forwarding. This paper proposes a simple routing method called 'reflection routing' which utilizes optical transport links as optical buffers to improve the quality of service in optical packet switched networks in terms of packet loss ratio. We numerically demonstrate the effectiveness and applicability of reflection routing.

In this letter, adaptive modulation and coding (AMC) is combined with multiple input multiple output (MIMO) multiplexing to improve the throughput performance of AMC. In addition, a system that adopts selection transmit diversity (STD) in the AMC-MIMO multiplexing system, AMC-STD-MIMO multiplexing system, is proposed. STD in our simulation selects 2 transmission antennas from 4 antennas and AMC-MIMO multiplexing process operates with the selected antennas. The computer simulation is performed in a flat Rayleigh fading channel. The results show that the proposed AMC-STD-MIMO multiplexing system achieves the SNR gain of 4.0 dB, compared to the AMC-MIMO multiplexing system at 3 Mbps throughput.

This paper presents the improvement of the transient response and stability for a two-stage DC-DC converter by removing the output inductor. The conventional two-stage converter consists of a buck converter used as the first stage and a half-bridge converter used as the second stage. The proposed circuit topology removing the output inductor and the conventional topology are compared. Removing the output inductor results in the system-order reduction of the transfer function. As a result, the stability is improved, and the crossover frequency of the open-loop transfer function becomes higher. The effectiveness of the proposed circuit topology was experimentally confirmed.

We have proposed a new low-IF transceiver architecture to simultaneously achieve both a small chip area and good minimum input sensitivity. The distinctive point of the receiver architecture is that we replace the complicated high-order analog filter for channel selection with the combination of a simple low-order analog filter and a sharp digital band-pass filter. We also proposed a high-speed convergence AGC (automatic gain controller) and a demodulation block to realize the proposed digital architecture. For the transceiver, we further reduce the chip area by applying a new form of direct modulation for the VCO. Since conventional VCO direct modulation tends to suffer from variation of the modulation index with frequency, we have developed a new compensation technique that minimizes this variation, and designed the low-phase noise VCO with a new biasing method to achieve large PSRR (power-supply rejection ratio) for oscillation frequency. The test chip was fabricated in 0.35-µm BiCMOS. The chip size was 3 3 mm2; this very small area was realized by the advantages of the proposed transceiver architecture. The transceiver also achieved good minimum input sensitivity of -85 dBm and showed interference performance that satisfied the requirements of the Bluetooth standard.

This letter discusses the performance of online SNR estimation including fading parameter estimation for parallel combinatorial SS (PC/SS) systems. The PC/SS systems are partial-code-parallel multicode SS systems, which have high-rate data transmission capability. Nakagami-m distribution is assumed as fading channel model to cover a wide range of fading conditions. The SNR and fading parameter estimation considered in this letter is based on only a statistical ratio of correlator outputs at the receiver. Numerical results show that SNR estimation performance with fading parameter estimation is close to the one in the case of perfect fading parameter information, if the number of transmitting PN codes is less than a half of assigned PN codes.

Integral equation method is used to compute three-dimension-structure capacitance in this paper. Since some multi-conductor structures present regular periodic property, the periodic cell is used to reduce the computational domain with adding appropriate magnetic and electric walls. The periodic Green's function in the integral equation method is represented in the form of infinite series with slow convergence. In this paper, Shanks transformation is used to accelerate the convergence. Numerical examples show that the proposed method is accurate with a much higher efficiency in capacitance extraction for 3-D periodic structures.

A high-speed bipolar ECL comparator circuit with a latch is described. The spike noise generated by charging the base-to-emitter diffusion capacitor on the transition of differential transistors' switching in a sample-and-latch circuit is reduced by inserting the emitter degeneration resistors so that neither of them becomes completely cut off. The frequency bandwidth of a pre-amplifier is increased by using coupled inductors as differential loads. As a result, -3 dB frequency bandwidth of a pre-amplifier becomes 10 GHz, and 4 GS/s operation with 6-bit equivalent precision from a 3.3 V power supply is confirmed by the circuit simulation using device parameters from the 25 GHz silicon bipolar process.

This paper presents the realization of the radio frequency (RF) power and data transmission for implantable microstimulators. This implantable device composes an internal RF front-end circuit, a control circuit, and a microstimulator. A 2 MHz AM-modulated signal including the power and data necessary for the implantable device is received, and a stable dc voltage and digital data will be extracted to further stimulate neuromuscular stimulation. In this implantable stimulator, the digital part is implemented by field programmable gate array (FPGA), and the analog part is implemented in a standard single-poly fifth-metal 0.25 µm CMOS process. The latter occupies a silicon area smaller than 0.00638 mm2 and produces an output current with 5-bit resolution for stimulations. The measuring stimulating current is 2.77 mA while the stimulation frequency is from 20 Hz to 2 kHz and the pulse width of stimulation current is from 100 µs to 450 µs. In addition, the simulation results of the RF front-end circuit and the verification of the control logic circuit are also presented in this paper.

This paper describes a design of a compact active loop filter for Phase-Locked-Loop (PLL) with adaptive biasing technique. Using the new loop filter, the PLL can automatically adjust the loop bandwidth and damping factor to the frequency of the reference clock. Moreover, the new LPF can decrease the capacitance value to 1/10-1/20 of conventional one. A test chip was fabricated in 0.15 µm-CMOS process. The total chip area of the PLL is reduced to 1/2 of the previous one. The jitter performance is almost equal to conventionally biased PLL.

Design approach to improving fmax of InP-based HBTs by combining lateral scaling (lithographic scaling) and vertical scaling (improving fT) is discussed. An HBT scaling model is formulated to provide means of analyzing the essential impact of scaling on fmax. The model was compared with measurements of single and double heterojunction bipolar transistors with different fT and various emitter sizes. While a high fmax of 313 GHz was achieved using submicron HBT with high fT, it was found that further improvement could have been obtained by reducing the emitter resistance, which has imposed considerable limit on lateral scaling.

The goal of source localization in the brain is to estimate a set of parameters for representing source characteristics; one of such parameters is the source number. We here propose a method combining the Powell algorithm with the information criterion method for determining the optimal dipole number. The potential errors can be calculated by the Powell algorithm with the concentric 4-sphere head model and 32 electrodes, then the number of dipoles is determined by the information criterion method with the potential errors mentioned above. This method has the advantages of a high identification accuracy of dipole number and a small number of EEG data because in this method: (1) only one EEG topography is used in the computation, (2) 32 electrodes are used to obtain the EEG data, (3) the optimal dipole number can be obtained by this method. In order to prove our method to be efficient, precise and robust to noise, 10% white noise is introduced to test this method theoretically. Some investigations are presented here to show our method is an advanced approach for determining the optimal dipole number.

This paper presents a novel class of sigma-delta modulator topologies for low-voltage, high-speed, and high-resolution applications with low oversampling ratios (OSRs). The main specifications of these architectures are the reduced analog circuit requirements, large out-of-band gain in the noise transfer function (NTF) without any stability concerns to achieve high signal to noise ratio (SNR) with a low OSR, and unity-gain signal transfer function (STF) to reduce the harmonic distortions resulted from the analog circuit imperfections. To demonstrate the efficiency of the proposed modulator architectures a prototype with HSPICE is implemented. A low-power two-stage class A/AB OTA with modified common mode feedback (CMFB) circuit in the first stage is used to implement the fourth order modulator. Simulation results with OSR of 16 give signal to noise plus distortion ratio (SNDR) and dynamic range (DR) of 90-dB and 92.5-dB including the circuit noise in the 1.25-MHz signal bandwidth, respectively. The circuit is implemented in a 0.13-µm standard CMOS technology. It dissipates about 40-mW from a single 1.2-V power supply voltage.

The threshold voltage mismatch of FD (Fully depleted) SOI (Silicon on insulator) devices have been studied. Floating body MOSFETs operating at high drain voltage show a large mismatch in the threshold voltage compared with body-tied MOSFETs. Those experimental data under different drain voltages indicate that both floating body effect and DIBL (Drain induced barrier lowering) are involved in the threshold voltage mismatch of floating body MOSFETs.

The rapid down-scaling of minimum feature size in CMOS technologies has boosted the RF performance, thereby opening up the RF application area to CMOS. The concurrent reduction of supply voltage pushes the MOSFETs used in circuit design more and more into the moderate-inversion regime of operation. As a consequence, compact MOS models are needed that are accurate in all operating regimes, including the moderate-inversion regime. Advanced analogue applications require accurate modelling of distortion, capacitances and noise. RF application of MOSFETs require the extension of this accurate modelling up to high frequencies and in addition accurate modelling of impedance levels and power gain. The implications for compact MOS models will be discussed, together with the state-of-the-art in compact MOS modelling. Special attention will be paid to some well-known circuit examples, and the compact model requirements needed for a correct description. Where relevant MOS Model 11 will be used to illustrate the discussion.

A robust watermarking scheme based on the time-spread echo method is proposed in this letter. The embedding process is achieved by subband decomposition of a host signal and by controlling the amount of distortion, i.e., power of watermark, of each subband according to the Signal to Mask Ratio (SMR) calculated from MPEG psychoacoustic model. The decoding performance and robustness of the proposed method were evaluated.

As the Internet proliferates, there has been a growing interest in supporting multiparty collaborative applications. It has led to the emergence of many-to-ma ny reliable multicast. Congestion control is a key task in reliable multicast along with error control. However, existing tree-based congestion control schemes such as TRAMCC and MTCP are designed for one-to-many reliable multicast and have some drawbacks when they are used for many-to-many reliable multicast. We propose an efficient congestion control mechanism, MTRMCC, for tree-based many-to-many reliable multicast protocols. The proposed scheme is based on the congestion windowing mechanism and a rate controller is used in addition. The feedback for error recovery is exploited for congestion control as well to minimize the overhead at the receivers. The ACK timer and the NACK timers are set dynamically reflecting the network traffic changes. The rate regulation algorithm in the proposed scheme is designed to help the flows sharing the same link to achieve the fair share quickly. The performance of the proposed scheme is evaluated using network simulator ns-2. The simulation results show that the proposed scheme outperforms TRAMCC in terms of intra-session fairness and supports responsiveness, TCP-friendliness, and scalability.

Net auctions have been widely utilized with the recent development of the Internet. However, it is a problem that there are too many items for bidders to select the most suitable one. We aim at supporting the bidders on net auctions by automatically generating a table which contains the features of several items for comparison. We construct a system called NTM-Agent (Net auction Text Mining Agent). The system collects web pages of items and extracts the items' features from the pages. After that, it generates a table which contains the extracted features. This research focuses on two problems in the process. The first problem is that if the system collects items automatically, the results contain the items which is different from the items of the user's target. The second problem is that the descriptions in net auctions are not uniform (There are different formats such as sentences, items and tables. The subjects of some sentences are omitted. ). Therefore, it is difficult to extract the information from the descriptions by conventional methods of information extraction. This research proposes methods to solve the problems. For the first problem, NTM-Agent filters the items by correlation rules about the keywords in the titles and the item descriptions. These rules are created semi-automatically by a support tool. For the second problem, NTM-Agent extracts the information by distinguishing the formats. It also learns the feature values from plain examples for the future extraction.

Radars utilizing ultra-wide-band (UWB) pulses are attractive as an environment measurement method for various applications including household robots. Suitable filtering is essential for accurate ranging, which requires an accurate waveform estimation. This paper presents a high-resolution algorithm of estimating target location and scattered waveforms, whose accuracies are interdependent. The technique relies on iterative improvements of estimated waveforms. Description of the algorithm is followed by statistical simulation examples. The performance of the algorithm is contrasted with conventional ones and statistical bounds. Results indicate that our proposed algorithm has a remarkable performance, which is close to the theoretical limit. Next, we clarify the problem of applying HCT to multiple targets. HCT for multiple targets can not be used as an estimated waveform because of interference waves from other targets. We propose an interference suppression algorithm based on a neural network, and show an application example of the algorithm.

We analyze the Lagarias-Odlyzko low-density attack precisely, and show that this low-density attack can be applied to the Chor-Rivest and the Okamoto-Tanaka-Uchiyama cryptosystemes, which are considered to be secure against the low-density attack. According to our analysis, these schemes turn out to be no longer secure against the low-density attack.