In this paper we propose a new blind adaptive compensator associated with the inverse QRD-RLS (IQRD-RLS) algorithm to adaptively estimate the parameters, related to the effects of gain/phase imbalance and DC offsets occur in the Quadrature demodulator, for compensation. In this new approach the power measurement of the received signal is employed to develop the blind adaptation algorithm for compensator, it does not require any reference signal transmitted from the transmitter and possess the fast convergence rate and better numerical stability. To verify the great improvement, in terms of reducing the effects of the imbalance and offset, over existing techniques computer simulation is carried out for the coherent 16 PSK-communication system. We show that the proposed blind scheme has rapidly convergence rate and the smaller mean square error in steady state.

Online shopping is becoming more and more popular in recent years. However, users are still unable to find what they want on the online market very efficiently. In our previous paper we suggested a system that helps to find short-sleeved T-shirts for young women on the online market. Then we conducted several verification experiments and proved that the system was effective. In this paper, we modified the system by adopting the following schemes in order to make it more versatile; First, all information is presented in a unified format. Second, users are provided with multiple-choice key words. Third, users search results are used to select information that is truly useful for the user. Lastly, we conducted several verification experiments and proved that these schemes were effective.

Circuit partition, retiming and state reordering techniques are effective in reducing power consumption of circuits. In this paper, we propose a partition architecture and a methodology to reduce power consumption when designing low power IP, named PRC (Partition and Reordering Circuit). The circuit reordering synthesis flow consists of three phases: first, evenly partition the circuit based on the Shannon expansion; secondly encode the output vectors of each partition to build an equivalent functional logic. Finally, apply reordering algorithm to reorganize the logic function to reduce power consumption and decrease area cost. The validity of our architecture is proven by applying it to MCNC benchmark with simulation environment.

Adaptive antenna array is a promising technique to increase the link capacity in mobile radio communications systems by suppressing multiple access interference (MAI). In the mobile radio, the received signal consists of discrete paths, each being a cluster of many irresolvable paths arriving from different directions. For large arrival angle spread of each cluster of irresolvable paths, antenna array cannot form a beam pattern that sufficiently suppresses MAI even in the presence of single interference signal and hence, the transmission performance may degrade. In this situation, the use of antenna diversity may be a better solution. It is an interesting question as to which can achieve a better performance, antenna diversity reception or adaptive antenna array. In this letter, we study the impact of the arrival angle spread on the DS-CDMA transmission performances achievable with adaptive antenna array and antenna diversity reception. It is pointed out that the arrival angle spread is an important parameter to determine the performances of adaptive antenna array and antenna diversity.

Energy dissipation in cache memories is becoming a major design issue for embedded microprocessors. Predictive filter cache based instruction cache hierarchy has been shown to effectively reduce the energy-delay product. In this paper, a simplified pattern prediction algorithm is proposed for the filter cache hierarchy. The prediction scheme relies on the static nature of the hit or miss pattern of the instruction access streams. The static patterns are maintained in a small 32x1-bit wide Static Pattern Table (SPT). Our investigations show that the proposed prediction algorithm is superior to that based on Next Fetch Prediction Table (NFPT) for all the benchmarks simulated. With the proposed approach, energy delay product reduction of up to 6.79% was evident when compared with that using NFPT. Moreover, since the prediction scheme is based on the static assignment of patterns, it lends well for area and power efficient implementation than that employs dynamic pattern prediction although it is marginally inferior (i.e. 0.69%) in term of energy delay product.

A new speaker feature extracted from multi-wavelet decomposition for speaker recognition is described. The multi-wavelet decomposition is a multi-scale representation of the covariance matrix. We have combined wavelet transform and the multi-resolution singular value algorithm to decompose eigenvector for speaker feature extraction not at the square matrix. Our results have shown that this multi-wavelet feature introduced better performance than the cepstrum and Δ-cepstrum with respect to the percentages of recognition.

A power-aware interconnect circuit design--called µI/O architecture--has been developed to provide low-cost system solutions for System-on-Chip (SoC) and System-in-Package (SiP) technologies. The µI/O architecture provides a common interface throughout the module enabling hierarchical I/O design for SoC and SiP. The hierarchical I/O design allows the driver size to be optimized without increasing design complexity. Moreover, it includes a signal-level converter for integrating wide-voltage-range circuit blocks and a signal wall function for turning off each block independently--without invalid signal transmission--by using an internal power switch.

This letter presents a novel quandtree-based image authentication technique especially suitable for the content authentication of high quality required digital images. The host image and the hiding marks generate quadtrees which record the information of host images. Any malicious tamper to the image is reflected from the recovered marks. Compared to other authentication schemes based on the fragile watermarking technique, the host image is not at all modified and the detection to malicious tamper is sensitive.

A compact, low voltage, low power and wide output operating range CMOS exponential-control variable-gain amplifier has been presented. The gain control range of the proposed variable-gain amplifier can be about 50.7 dB while the maximum linearity error is about -1.09%. For the case of supply voltage VDD = 2 V, the maximum power dissipation is only 1.6 µW. The proposed circuit has been fabricated in a 0.5 µm 2p2m N-well CMOS process. Experimental results are given to confirm the feasibility of the proposed variable gain amplifier. The proposed circuit is expected to be useful in analog signal processing applications.

The paper presents a novel stroke decomposition approach based on a directional filtering technique for recognizing Chinese characters. The proposed filtering technique uses a set of the second-order Gaussian derivative (SOGD) filters to decompose a character into a number of stroke segments. Moreover, a new Gaussian function is proposed to overcome the general limitation in extracting stroke segments along some fixed and given orientations. The Gaussian function is designed to model the relationship between the orientation and power response of the stroke segment in the filter output. Then, an optimal orientation of the stroke segment can be estimated by finding the maximal power response of the stroke segment. Finally, the effects of decomposition process are analyzed using some simple structural and statistical features extracted from the stroke segments. Experimental results indicate that the proposed SOGD filtering-based approach is very efficient to decompose noisy and degraded character images into a number of stroke segments along an arbitrary orientation. Furthermore, the recognition performance from the application of decomposition process can be improved about 17.31% in test character set.

A method for estimating the bit-error rate (BER) of turbo codes called the Monte Carlo distance spectrum method is proposed. Testing this method shows that the estimated BER curves closely approximate the results of a Monte Carlo simulation.

The alternating variant of the shrinking two-pushdown automaton of Buntrock and Otto (1998) is introduced. It is shown that the class of languages accepted by these automata is contained in the class of deterministic context-sensitive languages, and that it contains a PSPACE-complete language. Hence, the closure of this class of languages under log-space reductions coincides with the complexity class PSPACE.

This paper proposes an inter-symbol interference (ISI) suppression scheme using only the even-numbered sub-carriers for the fixed-rate OFDM systems with the 2-dimensional modulation. The proposed scheme is based on the principle that the first half of the waveform in the time domain is the same as the second half when an OFDM symbol is composed of only the even-numbered sub-carriers. The feature of the proposed scheme is that, in the case of the maximum multipath delay beyond the duration of the guard interval, the OFDM symbol with only the even-numbered sub-carriers is transmitted in order to generate the extended virtual guard interval and that the high-level modulation with the sub-carrier power enhancement is applied to achieve the constant data rate. In addition, at the receiver, only the second half of the OFDM symbol is used for the FFT processing to avoid the ISI. Moreover, the condition of the maximum multipath delay is notified to the transmitter by using the feedback channel. Numerical results given by computer simulation showed that the proposed scheme provides far better bit error rate (BER) performance than the traditional OFDM transmission using all sub-carriers under the multipath delay beyond the duration of the guard interval.

In this paper, a novel Wold decomposition algorithm is proposed to address the issue of deterministic component extraction for texture images. This algorithm exploits the wavelet-based singularity detection theory to process both harmonic a nd evanescent features from frequency domain. This exploitation is based on the 2D Lebesgue decomposition theory. When applying multiresolution analysis techniq ue to the power spectrum density (PSD) of a regular homogeneous random field, its indeterministic component will be effectively smoothed, and its deterministic component will remain dominant at coarse scale. By means of propagating these positions to the finest scale, the deterministic component can be properly extracted. From experiment, the proposed algorithm can obtain results that satisfactorily ensure its robustness and efficiency.

This paper presents a technique for improving the SNR and resolution of complex bandpass ΔΣADCs which are used for wireless communication systems such as cellular phone, wireless LAN and Bluetooth. Oversampling and noise-shaping are used to achieve high accuracy of a ΔΣAD modulator. However when a multi-bit internal DAC is used inside a modulator, nonlinearities of the DAC are not noise-shaped and the SNR of the ΔΣADC degrades. For the conversion of complex intermediate frequency (IF) input signals, a complex bandpass ΔΣAD modulator can provide superior performance to a pair of real bandpass ΔΣAD modulators of the same order. This paper proposes a new noise-shaping algorithm--implemented by adding simple digital circuitry--to reduce the effects of nonlinearities in multi-bit DACs of complex bandpass ΔΣAD modulators. We have performed simulation with MATLAB to verify the effectiveness of the algorithm, and the results show that the proposed algorithm can improve the SNR of a complex bandpass ΔΣADC with nonlinear internal multi-bit DACs.

Finding DC operating points of transistor circuits is an important and difficult task. The Newton-Raphson method adopted in SPICE-like simulators often fails to converge to a solution. To overcome this convergence problem, homotopy methods have been studied from various viewpoints. For efficiency of globally convergent homotopy methods, it is important to give an appropriate initial solution as a starting point. However, there are few studies concerning such initial solution algorithms. In this paper, initial solution problems in homotopy methods are discussed, and an effective initial solution algorithm is proposed for globally convergent homotopy methods, which finds DC operating points of transistor circuits efficiently. Numerical examples using practical transistor circuits show the effectiveness of the proposed algorithm.

The paper discusses the spatio-temporal phenomena in autonomous two-layer Cellular Neural Networks (CNNs) with mutually coupled templates between two layers. By computer calculations, we show how pattern formations, autowaves and classical waves can be regenerated in the networks, and describe the properties of these phenomena in detail. In particular, we focus our discussion on the necessary conditions for generating these spatio-temporal phenomena. In addition, the influences of the template parameters and initial state conditions of CNNs on the spatio-temporal phenomena are investigated.

A scheme of error correction for JPEG2000 codestream is proposed in this paper. The scheme uses a forward error correction code (FEC) and a data hiding technique. The headers and the higher quality layers of the codestream are coded using FEC codes. Then the parity data are separated from the FEC-coded data and hidden in the JPEG2000 codestream. The hidden data are used for error correction at the decoder. Several error correction codes with different strength are selected for the main header, the tile-part headers, the packet headers, and the bodies. The codestream generated by the proposed scheme has backward compatibility with a standard JPEG2000 codestream. Thus, it can be decoded with a general decoder. Simulation results demonstrated the effectiveness of the proposed scheme.

This paper proposes an instruction-level power estimation method for an embedded RISC processor, the power consumption of which fluctuates so much by applications and input data. The proposed method estimates the power consumption from the result of ISS (Instruction Set Simulator) and energy tables according to Hamming Distance of Registers (HDR) of all instructions. It is over 105 times faster than the gate-level detailed logic simulation, while the estimated power curves have the same tendency with those from the logic simulation. The proposed method realizes both accurate and fast power estimation of embedded processors.

Watermarking schemes have been extensively discussed and developed recently. People are usually facing the dilemma of two factors, robustness and transparency. To achieve these requirements, embedding the watermark message in the transform domain or the spatial domain is usually considered. In this paper, we will propose a blind image watermarking scheme based on vector quantization. By exploiting a modified binary tree splitting method, a stable codebook could be generated so that the watermark message could be novelly embedded and survive the JPEG compression and the Gaussian noise addition. The embedded message could be extracted without referring the host image. It makes the scheme more practical.