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[Keyword] four-terminal device(2hit)

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  • Functionality Enhancement in Elemental Devices for Implementing Intelligence on Integrated Circuits

    Tadahiro OHMI  Tadashi SHIBATA  

     
    INVITED PAPER

      Vol:
    E80-C No:7
      Page(s):
    841-848

    An alternative approach to increasing the functional capability of an integrated circuit chip other than the conventional scaling approach is presented and discussed. We will show the functional enhancement at a very elementary device level is essential in implementing intelligent functions at a system level. The concept of a four-terminal device is reviewed as a guiding principle in considering the device functionality enhancement. As an example of a four-terminal device, the neuron MOS transistor is presented. Applications of neuron MOS transistors to several new architecture circuits are demonstrated and the possibility of implementing intelligent functions directly on integrated circuit hardware is discussed.

  • The Concept of Four-Terminal Devices and Its Significance in the Implementation of Intelligent Integrated Circuits

    Tadahiro OHMI  Tadashi SHIBATA  

     
    PAPER

      Vol:
    E77-C No:7
      Page(s):
    1032-1041

    It is demonstrated that the enhancement in the functional capability of an elemental transistor is quite essential in developing human-like intelligent electronic systems. For this purpose we have introduced the concept of four-terminal devices. Four-terminal devices have an additional dimension in the degree of freedom in controlling currents as compared to the three-terminal devices like bipolar and MOS transistors. The importance of the four-terminal device concept is demonstrated taking the neuron MOS transistor (abbreviated as neuMOS or νMOS) and its circuit applications as examples. We have found that any Boolean functin can be realized by a two-stage configuratin of νMOS inverters. In addition, the variable threshold nature of the device allows us to build real-time reconfigurable logic circuits (no floating gate charging effect is involved in varying the threshold). Based on the principle, we have developed Soft-Hardware Logic Circuits and Real-Time Rule-Variable Data Matching Circuits. A winner-take-all circuit which finds the largest signal by hardware parallel processing has been also developed. The circuit is applied to building an associative memory which is different from Hopfield network in both principle and operation. The hardware algorithm in which binary, multivalue, and analog operations are merged at a very device level is quite essential to establish intelligent information processing systems based on highly flexible, real-time programmable hardwares realized by four-terminal devices.