In DC/DC converters with low output voltage and high output current, the technique of synchronous rectification is widely used for improving the output efficiency. However, SR buck converters can experience the abnormal phenomenon called “self turn-on” which will occur in the low-side switch under some circuit conditions. “Self turn-on” is a malfunction of the low-side switch, basically caused by the resonance of the parasitic inductance and the parasitic capacitance. It results in noticeable power dissipation. In this paper, the phenomenon will be clearly described and investigated. With the theoretical analysis and the experimental verification, strategies that can suppress this phenomenon are proposed.

A unipolar n-n heterostrucuture diode is developed in the InP material system. The electronic barrier is formed by a saw tooth type of conduction band bending which consists of a quaternary In0.52(AlyGa1-y)0.48As layer with 0 < y < ymax. This barrier is lattice matched for all y to InP and is embedded between two n+-InGaAs layers. By varying the maximum Al-content from ymax,1 = 0.7 to ymax,2 = 1 a variable barrier height is formed which enables a diode-type I-V characteristic by epitaxial design with an adjustable current density within 3 orders of magnitude. The high current density of the diode with the lower barrier height (ymax,1 = 0.7) makes it suitable for high frequency applications at low signal levels. RF measurements reveal a speed index of 52 ps/V at VD = 0.15 V. The device is investigated for RF-to-DC power conversion in UHF RFID transponders with low-amplitude RF signals.

This study investigates a band extension technique for narrow-band telephony speech. The proposed technique employs full wave rectification that nonlinearly generates high-band overtones from the low band. In order to improve the conventional technique, this study investigates a frame-by-frame gain control based on the estimation of gain parameter from narrow-band telephony speech. A subjective evaluation indicates that the proposed technique outperforms the conventional technique.

We propose a unique synchronous rectification method in the rectification circuit of a DC-DC converter. This paper describes a novel synchronous rectification circuit that uses a saturable current transformer. We explain operations of this circuit, and analyzed them in this work. In addition, we verified operations of this method applied in boost converter and demonstrated its effectiveness when two or more converters operate in parallel through simulations and experiments.

Image rectification is a method of aligning epipolar lines of image pairs taken from widely variant viewpoints. Using the rectified images, we can easily obtain corresponding points. This paper presents a rectification method for object segmentation. Using the rectified image pairs obtained with the proposed method, we are able to find the reliable disparity and estimate the 3D depth of the pixel that is effective in the object segmentation.

A 3D display using super high-density multi-view images should enable reproduction of natural stereoscopic views. In the super multi-view display system, viewpoints are sampled at an interval narrower than the diameter of the pupil of a person's eye. With the parallax produced by a single eye, this system can pull out the accommodation of an eye to an object image. We are now working on a real-time view-interpolation system for the super multi-view 3D display. A multi-view camera using convergence capturing to prevent resolution degradation captures multi-view images of an object. Most of the data processing is used for view interpolation and rectification. View interpolation is done using a high-speed image-processing board with digital-signal-processor (DSP) chips or single instruction stream and multiple data streams (SIMD) parallel processor chips. Adaptive filtering of the epipolar plane images (EPIs) is used for the view-interpolation algorithm. The multi-view images are adaptively interpolated using the most suitable filters for the EPIs. Rectification, a preprocess, converts the multi-view images in convergence capturing into the ones in parallel capturing. The use of rectified multi-view images improves the processing speed by limiting the interpolation processing in EPI.

This paper presents techniques for generating the input patterns for locating logic design errors (PLE's) by Boolean function manipulation based on binary decision diagrams (BDD's). One PLE has one Boolean variable X or and constant values. A primary output of a correct circuit takes value X, while the designed circuit takes either 0 or 1. By using PLE's, the X-algorithms locate single or multiple logic design errors in a combinational circuit. Although PLE's play the most important role in the X-algorithms, the condition under which PLE's exist has not been formalized. This paper gives a formal analysis on the existence condition of PLE's. It is shown that the condition is always satisfied by incorporating another type of PLE. From the condition, an implicit representation of PLE's is derived. In addition, two kinds of approaches are presented for generating PLE's by Boolean function manipulation based on BDD's. One is an approach for generating all the existing PLE's. The other is a heuristic approach to obtain a limited number of PLE's in a short time. Both approaches generate PLE's including don't cares. Incorporating them, a compact representation of PLE is achieved. Experimental results have shown the compactness of the proposed representations and the availability of the pattern generation techniques.