The search functionality is under construction.
The search functionality is under construction.

A Memory-Efficient Pattern Matching with Hardware-Based Bit-Split String Matchers for Deep Packet Inspection

HyunJin KIM, Hong-Sik KIM, Jung-Hee LEE, Jin-Ho AHN, Sungho KANG

  • Full Text Views

    0

  • Cite this

Summary :

This paper proposes a hardware-based parallel pattern matching engine using a memory-based bit-split string matcher architecture. The proposed bit-split string matcher separates the transition table from the state table, so that state transitions towards the initial state are not stored. Therefore, total memory requirements can be minimized.

Publication
IEICE TRANSACTIONS on Communications Vol.E93-B No.2 pp.396-398
Publication Date
2010/02/01
Publicized
Online ISSN
1745-1345
DOI
10.1587/transcom.E93.B.396
Type of Manuscript
LETTER
Category
Network Management/Operation

Authors

Keyword