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A compact residue arithmetic multiplier based on the radix-4 signed-digit arithmetic is presented. Conventional residue arithmetic circuits have been designed using binary number arithmetic system, but the carry propagation arises which limits the speed of arithmetic operations in residue modules. In this paper, two radix-4 signed-digit (SD) number representations, {-2,-1,0,1,2} and {-3,-2,-1,0,1,2,3}, are introduced. The former is used for the input and output, and the later for the inner arithmetic circuit of the presented multiplier. Integers 4^{p} and 4^{p}*p* is a positive integer and both circuits for partial product generation and sum of the partial products can be efficiently constructed by using the multiple-valued current-mode circuits. The modulo *m* addition, *m*=4^{p} or *m*=4^{p}*m* multiplier can be compactly constructed using a binary tree of the multiple-valued modulo *m* SD adders, and consequently the modulo *m* multiplication is performed in *O*(log *p*) time. The number of MOS transistors required in the presented residue arithmetic multiplier is about 86*p*^{2} + 66*p*.

- Publication
- IEICE TRANSACTIONS on Electronics Vol.E82-C No.9 pp.1647-1654

- Publication Date
- 1999/09/25

- Publicized

- Online ISSN

- DOI

- Type of Manuscript
- Special Section PAPER (Special Issue on Integrated Electronics and New System Paradigms)

- Category
- Non-Binary Architectures

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Shugang WEI, Kensuke SHIMIZU, "Compact Residue Arithmetic Multiplier Based on the Radix-4 Signed-Digit Multiple-Valued Arithmetic Circuits" in IEICE TRANSACTIONS on Electronics,
vol. E82-C, no. 9, pp. 1647-1654, September 1999, doi: .

Abstract: A compact residue arithmetic multiplier based on the radix-4 signed-digit arithmetic is presented. Conventional residue arithmetic circuits have been designed using binary number arithmetic system, but the carry propagation arises which limits the speed of arithmetic operations in residue modules. In this paper, two radix-4 signed-digit (SD) number representations, {-2,-1,0,1,2} and {-3,-2,-1,0,1,2,3}, are introduced. The former is used for the input and output, and the later for the inner arithmetic circuit of the presented multiplier. Integers 4^{p} and 4^{p}*p* is a positive integer and both circuits for partial product generation and sum of the partial products can be efficiently constructed by using the multiple-valued current-mode circuits. The modulo *m* addition, *m*=4^{p} or *m*=4^{p}*m* multiplier can be compactly constructed using a binary tree of the multiple-valued modulo *m* SD adders, and consequently the modulo *m* multiplication is performed in *O*(log *p*) time. The number of MOS transistors required in the presented residue arithmetic multiplier is about 86*p*^{2} + 66*p*.

URL: https://global.ieice.org/en_transactions/electronics/10.1587/e82-c_9_1647/_p

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@ARTICLE{e82-c_9_1647,

author={Shugang WEI, Kensuke SHIMIZU, },

journal={IEICE TRANSACTIONS on Electronics},

title={Compact Residue Arithmetic Multiplier Based on the Radix-4 Signed-Digit Multiple-Valued Arithmetic Circuits},

year={1999},

volume={E82-C},

number={9},

pages={1647-1654},

abstract={A compact residue arithmetic multiplier based on the radix-4 signed-digit arithmetic is presented. Conventional residue arithmetic circuits have been designed using binary number arithmetic system, but the carry propagation arises which limits the speed of arithmetic operations in residue modules. In this paper, two radix-4 signed-digit (SD) number representations, {-2,-1,0,1,2} and {-3,-2,-1,0,1,2,3}, are introduced. The former is used for the input and output, and the later for the inner arithmetic circuit of the presented multiplier. Integers 4^{p} and 4^{p}*p* is a positive integer and both circuits for partial product generation and sum of the partial products can be efficiently constructed by using the multiple-valued current-mode circuits. The modulo *m* addition, *m*=4^{p} or *m*=4^{p}*m* multiplier can be compactly constructed using a binary tree of the multiple-valued modulo *m* SD adders, and consequently the modulo *m* multiplication is performed in *O*(log *p*) time. The number of MOS transistors required in the presented residue arithmetic multiplier is about 86*p*^{2} + 66*p*.

keywords={},

doi={},

ISSN={},

month={September},}

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TY - JOUR

TI - Compact Residue Arithmetic Multiplier Based on the Radix-4 Signed-Digit Multiple-Valued Arithmetic Circuits

T2 - IEICE TRANSACTIONS on Electronics

SP - 1647

EP - 1654

AU - Shugang WEI

AU - Kensuke SHIMIZU

PY - 1999

DO -

JO - IEICE TRANSACTIONS on Electronics

SN -

VL - E82-C

IS - 9

JA - IEICE TRANSACTIONS on Electronics

Y1 - September 1999

AB - A compact residue arithmetic multiplier based on the radix-4 signed-digit arithmetic is presented. Conventional residue arithmetic circuits have been designed using binary number arithmetic system, but the carry propagation arises which limits the speed of arithmetic operations in residue modules. In this paper, two radix-4 signed-digit (SD) number representations, {-2,-1,0,1,2} and {-3,-2,-1,0,1,2,3}, are introduced. The former is used for the input and output, and the later for the inner arithmetic circuit of the presented multiplier. Integers 4^{p} and 4^{p}*p* is a positive integer and both circuits for partial product generation and sum of the partial products can be efficiently constructed by using the multiple-valued current-mode circuits. The modulo *m* addition, *m*=4^{p} or *m*=4^{p}*m* multiplier can be compactly constructed using a binary tree of the multiple-valued modulo *m* SD adders, and consequently the modulo *m* multiplication is performed in *O*(log *p*) time. The number of MOS transistors required in the presented residue arithmetic multiplier is about 86*p*^{2} + 66*p*.

ER -