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An efficient large-signal modeling method of FET using load-line analysis is proposed, and it is applied to non-linear characterization of FET. In this method, instantaneous drain-source voltage *V*_{ds}(*t*) and drain-source current *I*_{ds}(*t*) waveforms are determined by load-line analysis while non-linear parameters in a large-signal equivalent circuit of FET are defined as the average values over one period corresponding to instantaneous *V*_{ds}(*t*) and *I*_{ds}(*t*). Output power (*P*_{out}), power added efficiency (η_{add}), and phase deviation calculated by using such an equivalent circuit of FET agree well with the measured results at 933.5 MHz. Phase deviation mechanism is explained based on the large-signal equivalent circuit of FET, and it is shown how non-linear parameters, such as trans-conductance (*g*_{m}), drain-source resistance (*R*_{ds}), gate-source capacitance (*C*_{gs}), and gate leak resistance (*R*_{ig}) contribute to positive or negative phase deviations. The difference between small-signal and large-signal *S*-parameters (*S*_{11}, *S*_{12}, *S*_{21}, *S*_{22}) is also discussed. The proposed large-signal modeling method is considered to be useful for the design of high power, high efficiency, and low distortion amplifiers as well as the investigation of the behavior of FET in large-signal operating conditions.

- Publication
- IEICE TRANSACTIONS on Electronics Vol.E84-C No.7 pp.875-880

- Publication Date
- 2001/07/01

- Publicized

- Online ISSN

- DOI

- Type of Manuscript
- Special Section PAPER (Special Issue on Techniques for Constructing Microwave Simulators--Design and Analysis Tools for Electromagnetic Fields, Circuits, and Antennas--)

- Category
- Modeling of Nonlinear Microwave Circuits

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Yukio IKEDA, Kazutomi MORI, Masatoshi NAKAYAMA, Yasushi ITOH, Osami ISHIDA, Tadashi TAKAGI, "An Efficient Large-Signal Modeling Method Using Load-Line Analysis and Its Application to Non-linear Characterization of FET" in IEICE TRANSACTIONS on Electronics,
vol. E84-C, no. 7, pp. 875-880, July 2001, doi: .

Abstract: An efficient large-signal modeling method of FET using load-line analysis is proposed, and it is applied to non-linear characterization of FET. In this method, instantaneous drain-source voltage *V*_{ds}(*t*) and drain-source current *I*_{ds}(*t*) waveforms are determined by load-line analysis while non-linear parameters in a large-signal equivalent circuit of FET are defined as the average values over one period corresponding to instantaneous *V*_{ds}(*t*) and *I*_{ds}(*t*). Output power (*P*_{out}), power added efficiency (η_{add}), and phase deviation calculated by using such an equivalent circuit of FET agree well with the measured results at 933.5 MHz. Phase deviation mechanism is explained based on the large-signal equivalent circuit of FET, and it is shown how non-linear parameters, such as trans-conductance (*g*_{m}), drain-source resistance (*R*_{ds}), gate-source capacitance (*C*_{gs}), and gate leak resistance (*R*_{ig}) contribute to positive or negative phase deviations. The difference between small-signal and large-signal *S*-parameters (*S*_{11}, *S*_{12}, *S*_{21}, *S*_{22}) is also discussed. The proposed large-signal modeling method is considered to be useful for the design of high power, high efficiency, and low distortion amplifiers as well as the investigation of the behavior of FET in large-signal operating conditions.

URL: https://global.ieice.org/en_transactions/electronics/10.1587/e84-c_7_875/_p

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@ARTICLE{e84-c_7_875,

author={Yukio IKEDA, Kazutomi MORI, Masatoshi NAKAYAMA, Yasushi ITOH, Osami ISHIDA, Tadashi TAKAGI, },

journal={IEICE TRANSACTIONS on Electronics},

title={An Efficient Large-Signal Modeling Method Using Load-Line Analysis and Its Application to Non-linear Characterization of FET},

year={2001},

volume={E84-C},

number={7},

pages={875-880},

abstract={An efficient large-signal modeling method of FET using load-line analysis is proposed, and it is applied to non-linear characterization of FET. In this method, instantaneous drain-source voltage *V*_{ds}(*t*) and drain-source current *I*_{ds}(*t*) waveforms are determined by load-line analysis while non-linear parameters in a large-signal equivalent circuit of FET are defined as the average values over one period corresponding to instantaneous *V*_{ds}(*t*) and *I*_{ds}(*t*). Output power (*P*_{out}), power added efficiency (η_{add}), and phase deviation calculated by using such an equivalent circuit of FET agree well with the measured results at 933.5 MHz. Phase deviation mechanism is explained based on the large-signal equivalent circuit of FET, and it is shown how non-linear parameters, such as trans-conductance (*g*_{m}), drain-source resistance (*R*_{ds}), gate-source capacitance (*C*_{gs}), and gate leak resistance (*R*_{ig}) contribute to positive or negative phase deviations. The difference between small-signal and large-signal *S*-parameters (*S*_{11}, *S*_{12}, *S*_{21}, *S*_{22}) is also discussed. The proposed large-signal modeling method is considered to be useful for the design of high power, high efficiency, and low distortion amplifiers as well as the investigation of the behavior of FET in large-signal operating conditions.},

keywords={},

doi={},

ISSN={},

month={July},}

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TY - JOUR

TI - An Efficient Large-Signal Modeling Method Using Load-Line Analysis and Its Application to Non-linear Characterization of FET

T2 - IEICE TRANSACTIONS on Electronics

SP - 875

EP - 880

AU - Yukio IKEDA

AU - Kazutomi MORI

AU - Masatoshi NAKAYAMA

AU - Yasushi ITOH

AU - Osami ISHIDA

AU - Tadashi TAKAGI

PY - 2001

DO -

JO - IEICE TRANSACTIONS on Electronics

SN -

VL - E84-C

IS - 7

JA - IEICE TRANSACTIONS on Electronics

Y1 - July 2001

AB - An efficient large-signal modeling method of FET using load-line analysis is proposed, and it is applied to non-linear characterization of FET. In this method, instantaneous drain-source voltage *V*_{ds}(*t*) and drain-source current *I*_{ds}(*t*) waveforms are determined by load-line analysis while non-linear parameters in a large-signal equivalent circuit of FET are defined as the average values over one period corresponding to instantaneous *V*_{ds}(*t*) and *I*_{ds}(*t*). Output power (*P*_{out}), power added efficiency (η_{add}), and phase deviation calculated by using such an equivalent circuit of FET agree well with the measured results at 933.5 MHz. Phase deviation mechanism is explained based on the large-signal equivalent circuit of FET, and it is shown how non-linear parameters, such as trans-conductance (*g*_{m}), drain-source resistance (*R*_{ds}), gate-source capacitance (*C*_{gs}), and gate leak resistance (*R*_{ig}) contribute to positive or negative phase deviations. The difference between small-signal and large-signal *S*-parameters (*S*_{11}, *S*_{12}, *S*_{21}, *S*_{22}) is also discussed. The proposed large-signal modeling method is considered to be useful for the design of high power, high efficiency, and low distortion amplifiers as well as the investigation of the behavior of FET in large-signal operating conditions.

ER -