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Silicon Planar Esaki Diode Operating at Room Temperature

Junji KOGA, Akira TORIUMI

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Summary :

Negative differential conductance based on lateral interband tunnel effect is demonstrated in a planar degenerate p+-n+ diode (Esaki tunnel diode). The device is fabricated with the current silicon ultralarge scale integration (Si ULSI) process, paying attention to the processing damage so as to reduce an excess tunnel current that flows over some intermediate states in the tunnel junction. I-V characteristics at a low temperature clearly show an intrinsic electron transport, indicating phonon-assisted tunneling in Si as in the case of the previous Esaki diodes fabricated by the alloying method. In addition, a simple circuit function of bistable operation is demonstrated by connecting the planar Esaki diode with conventional Si metal-oxide-semiconductor field effect transistors (MOSFETs). The planar Esaki diode will be a promising device element in the functional library for enhancing the total system performance for the coming system-on-a-chip (SoC) era.

Publication
IEICE TRANSACTIONS on Electronics Vol.E84-C No.8 pp.1051-1055
Publication Date
2001/08/01
Publicized
Online ISSN
DOI
Type of Manuscript
Special Section PAPER (Special Issue on Silicon Nanodevices)
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