The search functionality is under construction.

The search functionality is under construction.

A 19.1-to-20.4 GHz sigma-delta fractional-N frequency synthesizer with two-point modulation (TPM) for frequency modulated continuous wave (FMCW) radar applications is presented. The FMCW synthesizer proposes a digital and voltage controlled oscillator (D/VCO) with large continuous frequency tuning range and small digital controlled oscillator (DCO) gain variation to support TPM. By using TPM technique, it avoids the correlation between loop bandwidth and chirp slope, which is beneficial to fast chirp, phase noise and linearity. The start frequency, bandwidth and slope of the FMCW signal are all reconfigurable independently. The FMCW synthesizer achieves a measured phase noise of -93.32 dBc/Hz at 1MHz offset from a 19.25 GHz carrier and less than 10 µs locking time. The root-mean-square (RMS) frequency error is only 112 kHz with 94 kHz/µs chirp slope, and 761 kHz with a fast slope of 9.725 MHz/µs respectively. Implemented in 65 nm CMOS process, the synthesizer consumes 74.3 mW with output buffer.

- Publication
- IEICE TRANSACTIONS on Electronics Vol.E102-C No.1 pp.64-76

- Publication Date
- 2019/01/01

- Publicized

- Online ISSN
- 1745-1353

- DOI
- 10.1587/transele.E102.C.64

- Type of Manuscript
- PAPER

- Category
- Electronic Circuits

Yuanyuan XU

Fudan University

Wei LI

Fudan University

Wei WANG

Fudan University

Dan WU

Fudan University

Lai HE

Fudan University

Jintao HU

Fudan University

The copyright of the original papers published on this site belongs to IEICE. Unauthorized use of the original or translated papers is prohibited. See IEICE Provisions on Copyright for details.

Copy

Yuanyuan XU, Wei LI, Wei WANG, Dan WU, Lai HE, Jintao HU, "A 65 nm 19.1-to-20.4 GHz Sigma-Delta Fractional-N Frequency Synthesizer with Two-Point Modulation for FMCW Radar Applications" in IEICE TRANSACTIONS on Electronics,
vol. E102-C, no. 1, pp. 64-76, January 2019, doi: 10.1587/transele.E102.C.64.

Abstract: A 19.1-to-20.4 GHz sigma-delta fractional-N frequency synthesizer with two-point modulation (TPM) for frequency modulated continuous wave (FMCW) radar applications is presented. The FMCW synthesizer proposes a digital and voltage controlled oscillator (D/VCO) with large continuous frequency tuning range and small digital controlled oscillator (DCO) gain variation to support TPM. By using TPM technique, it avoids the correlation between loop bandwidth and chirp slope, which is beneficial to fast chirp, phase noise and linearity. The start frequency, bandwidth and slope of the FMCW signal are all reconfigurable independently. The FMCW synthesizer achieves a measured phase noise of -93.32 dBc/Hz at 1MHz offset from a 19.25 GHz carrier and less than 10 µs locking time. The root-mean-square (RMS) frequency error is only 112 kHz with 94 kHz/µs chirp slope, and 761 kHz with a fast slope of 9.725 MHz/µs respectively. Implemented in 65 nm CMOS process, the synthesizer consumes 74.3 mW with output buffer.

URL: https://global.ieice.org/en_transactions/electronics/10.1587/transele.E102.C.64/_p

Copy

@ARTICLE{e102-c_1_64,

author={Yuanyuan XU, Wei LI, Wei WANG, Dan WU, Lai HE, Jintao HU, },

journal={IEICE TRANSACTIONS on Electronics},

title={A 65 nm 19.1-to-20.4 GHz Sigma-Delta Fractional-N Frequency Synthesizer with Two-Point Modulation for FMCW Radar Applications},

year={2019},

volume={E102-C},

number={1},

pages={64-76},

abstract={A 19.1-to-20.4 GHz sigma-delta fractional-N frequency synthesizer with two-point modulation (TPM) for frequency modulated continuous wave (FMCW) radar applications is presented. The FMCW synthesizer proposes a digital and voltage controlled oscillator (D/VCO) with large continuous frequency tuning range and small digital controlled oscillator (DCO) gain variation to support TPM. By using TPM technique, it avoids the correlation between loop bandwidth and chirp slope, which is beneficial to fast chirp, phase noise and linearity. The start frequency, bandwidth and slope of the FMCW signal are all reconfigurable independently. The FMCW synthesizer achieves a measured phase noise of -93.32 dBc/Hz at 1MHz offset from a 19.25 GHz carrier and less than 10 µs locking time. The root-mean-square (RMS) frequency error is only 112 kHz with 94 kHz/µs chirp slope, and 761 kHz with a fast slope of 9.725 MHz/µs respectively. Implemented in 65 nm CMOS process, the synthesizer consumes 74.3 mW with output buffer.},

keywords={},

doi={10.1587/transele.E102.C.64},

ISSN={1745-1353},

month={January},}

Copy

TY - JOUR

TI - A 65 nm 19.1-to-20.4 GHz Sigma-Delta Fractional-N Frequency Synthesizer with Two-Point Modulation for FMCW Radar Applications

T2 - IEICE TRANSACTIONS on Electronics

SP - 64

EP - 76

AU - Yuanyuan XU

AU - Wei LI

AU - Wei WANG

AU - Dan WU

AU - Lai HE

AU - Jintao HU

PY - 2019

DO - 10.1587/transele.E102.C.64

JO - IEICE TRANSACTIONS on Electronics

SN - 1745-1353

VL - E102-C

IS - 1

JA - IEICE TRANSACTIONS on Electronics

Y1 - January 2019

AB - A 19.1-to-20.4 GHz sigma-delta fractional-N frequency synthesizer with two-point modulation (TPM) for frequency modulated continuous wave (FMCW) radar applications is presented. The FMCW synthesizer proposes a digital and voltage controlled oscillator (D/VCO) with large continuous frequency tuning range and small digital controlled oscillator (DCO) gain variation to support TPM. By using TPM technique, it avoids the correlation between loop bandwidth and chirp slope, which is beneficial to fast chirp, phase noise and linearity. The start frequency, bandwidth and slope of the FMCW signal are all reconfigurable independently. The FMCW synthesizer achieves a measured phase noise of -93.32 dBc/Hz at 1MHz offset from a 19.25 GHz carrier and less than 10 µs locking time. The root-mean-square (RMS) frequency error is only 112 kHz with 94 kHz/µs chirp slope, and 761 kHz with a fast slope of 9.725 MHz/µs respectively. Implemented in 65 nm CMOS process, the synthesizer consumes 74.3 mW with output buffer.

ER -