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With the scaling down of CMOS devices, process variation is becoming the leading cause of CMOS based analog circuit failures. For example, a mere 5% variation in feature size can trigger circuit failure. Various methods such as Monte-Carlo and corner-based verification help predict variation caused problems at the expense of thousands of simulations before capturing the problem. This paper presents a new methodology for analog circuit performance prediction. The new method first applies statistical uncertainty analysis on all associated devices in the circuit. By evaluating the uncertainty importance of parameter variability, it approximates the circuit with only components that are most critical to output results. Applying Chebyshev Affine Arithmetic (CAA) on the resulting system provides both performance bounds and probability information in time domain and frequency domain.

- Publication
- IEICE TRANSACTIONS on Electronics Vol.E93-C No.6 pp.893-904

- Publication Date
- 2010/06/01

- Publicized

- Online ISSN
- 1745-1353

- DOI
- 10.1587/transele.E93.C.893

- Type of Manuscript
- PAPER

- Category
- Electronic Circuits

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Jin SUN, Kiran POTLURI, Janet M. WANG, "Predicting Analog Circuit Performance Based on Importance of Uncertainties" in IEICE TRANSACTIONS on Electronics,
vol. E93-C, no. 6, pp. 893-904, June 2010, doi: 10.1587/transele.E93.C.893.

Abstract: With the scaling down of CMOS devices, process variation is becoming the leading cause of CMOS based analog circuit failures. For example, a mere 5% variation in feature size can trigger circuit failure. Various methods such as Monte-Carlo and corner-based verification help predict variation caused problems at the expense of thousands of simulations before capturing the problem. This paper presents a new methodology for analog circuit performance prediction. The new method first applies statistical uncertainty analysis on all associated devices in the circuit. By evaluating the uncertainty importance of parameter variability, it approximates the circuit with only components that are most critical to output results. Applying Chebyshev Affine Arithmetic (CAA) on the resulting system provides both performance bounds and probability information in time domain and frequency domain.

URL: https://global.ieice.org/en_transactions/electronics/10.1587/transele.E93.C.893/_p

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@ARTICLE{e93-c_6_893,

author={Jin SUN, Kiran POTLURI, Janet M. WANG, },

journal={IEICE TRANSACTIONS on Electronics},

title={Predicting Analog Circuit Performance Based on Importance of Uncertainties},

year={2010},

volume={E93-C},

number={6},

pages={893-904},

abstract={With the scaling down of CMOS devices, process variation is becoming the leading cause of CMOS based analog circuit failures. For example, a mere 5% variation in feature size can trigger circuit failure. Various methods such as Monte-Carlo and corner-based verification help predict variation caused problems at the expense of thousands of simulations before capturing the problem. This paper presents a new methodology for analog circuit performance prediction. The new method first applies statistical uncertainty analysis on all associated devices in the circuit. By evaluating the uncertainty importance of parameter variability, it approximates the circuit with only components that are most critical to output results. Applying Chebyshev Affine Arithmetic (CAA) on the resulting system provides both performance bounds and probability information in time domain and frequency domain.},

keywords={},

doi={10.1587/transele.E93.C.893},

ISSN={1745-1353},

month={June},}

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TY - JOUR

TI - Predicting Analog Circuit Performance Based on Importance of Uncertainties

T2 - IEICE TRANSACTIONS on Electronics

SP - 893

EP - 904

AU - Jin SUN

AU - Kiran POTLURI

AU - Janet M. WANG

PY - 2010

DO - 10.1587/transele.E93.C.893

JO - IEICE TRANSACTIONS on Electronics

SN - 1745-1353

VL - E93-C

IS - 6

JA - IEICE TRANSACTIONS on Electronics

Y1 - June 2010

AB - With the scaling down of CMOS devices, process variation is becoming the leading cause of CMOS based analog circuit failures. For example, a mere 5% variation in feature size can trigger circuit failure. Various methods such as Monte-Carlo and corner-based verification help predict variation caused problems at the expense of thousands of simulations before capturing the problem. This paper presents a new methodology for analog circuit performance prediction. The new method first applies statistical uncertainty analysis on all associated devices in the circuit. By evaluating the uncertainty importance of parameter variability, it approximates the circuit with only components that are most critical to output results. Applying Chebyshev Affine Arithmetic (CAA) on the resulting system provides both performance bounds and probability information in time domain and frequency domain.

ER -