This paper describes a digital delay-lock Loop (DLL) to which delta-sigma (Δ Σ) modulation technique is applied in order to reduce circuit elements. The DLL is evaluated in both transient and steady-state behavior by theoretical analysis, computer simulations and circuit experiments. Not deteriorated by the internally generated Δ Σ-modulation noise, the DLL shows good tracking performance in transient response and steady-state RMS jitter of phase error against additive white Gaussian noise. Using the proposed DLL most parts of receiving circuits are realized by digital integrated circuits. After realizing the circuit, power-line communication system with spread spectrum is possibly expected in a small size with low cost.
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Satoru HISHIDA, Hisato FUJISAKA, Teruo MIYASHITA, Chikara SATO, "Digital Delay-Lock Loop with Delta-Sigma Modulation for Power-Line Spread Spectrum Communications" in IEICE TRANSACTIONS on Fundamentals,
vol. E82-A, no. 12, pp. 2735-2742, December 1999, doi: .
Abstract: This paper describes a digital delay-lock Loop (DLL) to which delta-sigma (Δ Σ) modulation technique is applied in order to reduce circuit elements. The DLL is evaluated in both transient and steady-state behavior by theoretical analysis, computer simulations and circuit experiments. Not deteriorated by the internally generated Δ Σ-modulation noise, the DLL shows good tracking performance in transient response and steady-state RMS jitter of phase error against additive white Gaussian noise. Using the proposed DLL most parts of receiving circuits are realized by digital integrated circuits. After realizing the circuit, power-line communication system with spread spectrum is possibly expected in a small size with low cost.
URL: https://global.ieice.org/en_transactions/fundamentals/10.1587/e82-a_12_2735/_p
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@ARTICLE{e82-a_12_2735,
author={Satoru HISHIDA, Hisato FUJISAKA, Teruo MIYASHITA, Chikara SATO, },
journal={IEICE TRANSACTIONS on Fundamentals},
title={Digital Delay-Lock Loop with Delta-Sigma Modulation for Power-Line Spread Spectrum Communications},
year={1999},
volume={E82-A},
number={12},
pages={2735-2742},
abstract={This paper describes a digital delay-lock Loop (DLL) to which delta-sigma (Δ Σ) modulation technique is applied in order to reduce circuit elements. The DLL is evaluated in both transient and steady-state behavior by theoretical analysis, computer simulations and circuit experiments. Not deteriorated by the internally generated Δ Σ-modulation noise, the DLL shows good tracking performance in transient response and steady-state RMS jitter of phase error against additive white Gaussian noise. Using the proposed DLL most parts of receiving circuits are realized by digital integrated circuits. After realizing the circuit, power-line communication system with spread spectrum is possibly expected in a small size with low cost.},
keywords={},
doi={},
ISSN={},
month={December},}
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TY - JOUR
TI - Digital Delay-Lock Loop with Delta-Sigma Modulation for Power-Line Spread Spectrum Communications
T2 - IEICE TRANSACTIONS on Fundamentals
SP - 2735
EP - 2742
AU - Satoru HISHIDA
AU - Hisato FUJISAKA
AU - Teruo MIYASHITA
AU - Chikara SATO
PY - 1999
DO -
JO - IEICE TRANSACTIONS on Fundamentals
SN -
VL - E82-A
IS - 12
JA - IEICE TRANSACTIONS on Fundamentals
Y1 - December 1999
AB - This paper describes a digital delay-lock Loop (DLL) to which delta-sigma (Δ Σ) modulation technique is applied in order to reduce circuit elements. The DLL is evaluated in both transient and steady-state behavior by theoretical analysis, computer simulations and circuit experiments. Not deteriorated by the internally generated Δ Σ-modulation noise, the DLL shows good tracking performance in transient response and steady-state RMS jitter of phase error against additive white Gaussian noise. Using the proposed DLL most parts of receiving circuits are realized by digital integrated circuits. After realizing the circuit, power-line communication system with spread spectrum is possibly expected in a small size with low cost.
ER -