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Speedup of Frequency Switching Time in PLL Frequency Synthesizers Using a Target Frequency Detector

Shigeki OBOTE, Yasuaki SUMI, Naoki KITAI, Kouichi SYOUBU, Yutaka FUKUI, Yoshio ITOH

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Summary :

In this paper, we propose a speedup method of frequency switching time in the phase locked loop (PLL) frequency synthesizer using the target frequency detector (TFD). The TFD detects the time Ta for any channels where the output of the PLL frequency synthesizer reaches the target frequency for the first time. At Ta, the programmable divider, the reference divider and the phase comparator are reset, and the phase of the PLL frequency synthesizer is initialized and the phase synchronization is achieved. In the proposed method, since the ringing in the transient state does not occur, the output of the PLL frequency synthesizer converges to the target frequency at Ta and the frequency switching time is speeded up. The effectiveness of the proposed method will be confirmed by experimental results.

Publication
IEICE TRANSACTIONS on Fundamentals Vol.E82-A No.3 pp.436-441
Publication Date
1999/03/25
Publicized
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DOI
Type of Manuscript
Special Section PAPER (Special Section on Selected Papers from the 11th Workshop on Circuits and Systems in Karuizawa)
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