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This paper presents a new approach to designing arithmetic circuits by using a graph-based evolutionary optimization technique called Evolutionary Graph Generation (EGG). The key idea of the proposed method is to introduce a higher level of abstraction for arithmetic algorithms, in which arithmetic circuit structures are modeled as data-flow graphs associated with specific number representation systems. The EGG system employs evolutionary operations to transform the structure of graphs directly, which makes it possible to generate the desired circuit structure efficiently. The potential capability of EGG is demonstrated through an experiment of generating constant-coefficient multipliers.

- Publication
- IEICE TRANSACTIONS on Fundamentals Vol.E82-A No.5 pp.798-806

- Publication Date
- 1999/05/25

- Publicized

- Online ISSN

- DOI

- Type of Manuscript
- Special Section PAPER (Special Section on Discrete Mathematics and Its Applications)

- Category

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Takafumi AOKI, Naofumi HOMMA, Tatsuo HIGUCHI, "Evolutionary Design of Arithmetic Circuits" in IEICE TRANSACTIONS on Fundamentals,
vol. E82-A, no. 5, pp. 798-806, May 1999, doi: .

Abstract: This paper presents a new approach to designing arithmetic circuits by using a graph-based evolutionary optimization technique called Evolutionary Graph Generation (EGG). The key idea of the proposed method is to introduce a higher level of abstraction for arithmetic algorithms, in which arithmetic circuit structures are modeled as data-flow graphs associated with specific number representation systems. The EGG system employs evolutionary operations to transform the structure of graphs directly, which makes it possible to generate the desired circuit structure efficiently. The potential capability of EGG is demonstrated through an experiment of generating constant-coefficient multipliers.

URL: https://global.ieice.org/en_transactions/fundamentals/10.1587/e82-a_5_798/_p

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@ARTICLE{e82-a_5_798,

author={Takafumi AOKI, Naofumi HOMMA, Tatsuo HIGUCHI, },

journal={IEICE TRANSACTIONS on Fundamentals},

title={Evolutionary Design of Arithmetic Circuits},

year={1999},

volume={E82-A},

number={5},

pages={798-806},

abstract={This paper presents a new approach to designing arithmetic circuits by using a graph-based evolutionary optimization technique called Evolutionary Graph Generation (EGG). The key idea of the proposed method is to introduce a higher level of abstraction for arithmetic algorithms, in which arithmetic circuit structures are modeled as data-flow graphs associated with specific number representation systems. The EGG system employs evolutionary operations to transform the structure of graphs directly, which makes it possible to generate the desired circuit structure efficiently. The potential capability of EGG is demonstrated through an experiment of generating constant-coefficient multipliers.},

keywords={},

doi={},

ISSN={},

month={May},}

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TY - JOUR

TI - Evolutionary Design of Arithmetic Circuits

T2 - IEICE TRANSACTIONS on Fundamentals

SP - 798

EP - 806

AU - Takafumi AOKI

AU - Naofumi HOMMA

AU - Tatsuo HIGUCHI

PY - 1999

DO -

JO - IEICE TRANSACTIONS on Fundamentals

SN -

VL - E82-A

IS - 5

JA - IEICE TRANSACTIONS on Fundamentals

Y1 - May 1999

AB - This paper presents a new approach to designing arithmetic circuits by using a graph-based evolutionary optimization technique called Evolutionary Graph Generation (EGG). The key idea of the proposed method is to introduce a higher level of abstraction for arithmetic algorithms, in which arithmetic circuit structures are modeled as data-flow graphs associated with specific number representation systems. The EGG system employs evolutionary operations to transform the structure of graphs directly, which makes it possible to generate the desired circuit structure efficiently. The potential capability of EGG is demonstrated through an experiment of generating constant-coefficient multipliers.

ER -