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Low Latency 256-bit $mathbb{F}_p$ ECDSA Signature Generation Crypto Processor

Shotaro SUGIYAMA, Hiromitsu AWANO, Makoto IKEDA

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Summary :

A 256-bit $mathbb{F}_p$ ECDSA crypto processor featuring low latency, low energy consumption and capability of changing the Elliptic curve parameters is designed and fabricated in SOTB 65nm CMOS process. We have demonstrated the lowest ever reported signature generation time of 31.3 μs at 238MHz clock frequency. Energy consumption is 3.28 μJ/signature-generation, which is same as the lowest reported till date. We have also derived addition formulae on Elliptic curve useful for reduce the number of registers and operation cycles.

Publication
IEICE TRANSACTIONS on Fundamentals Vol.E101-A No.12 pp.2290-2296
Publication Date
2018/12/01
Publicized
Online ISSN
1745-1337
DOI
10.1587/transfun.E101.A.2290
Type of Manuscript
Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category

Authors

Shotaro SUGIYAMA
  The University of Tokyo
Hiromitsu AWANO
  The University of Tokyo
Makoto IKEDA
  The University of Tokyo

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