This paper proposes a voltage-to-current converter with nested feedback loop configuration to achieve high loop gain without reducing the bandwidth. Simulation results using 0.18-µm CMOS process parameters show that the proposed circuit has a good linearity performance. The simulated bandwidth is 350 MHz. The THD improvement of the proposed circuit is more than 60 dB compared to the one of a common gate circuit under a same total current consumption of 10.4 mA.
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Retdian NICODIMUS, Shigetaka TAKAGI, "Design of Wideband Linear Voltage-to-Current Converters" in IEICE TRANSACTIONS on Fundamentals,
vol. E93-A, no. 2, pp. 382-389, February 2010, doi: 10.1587/transfun.E93.A.382.
Abstract: This paper proposes a voltage-to-current converter with nested feedback loop configuration to achieve high loop gain without reducing the bandwidth. Simulation results using 0.18-µm CMOS process parameters show that the proposed circuit has a good linearity performance. The simulated bandwidth is 350 MHz. The THD improvement of the proposed circuit is more than 60 dB compared to the one of a common gate circuit under a same total current consumption of 10.4 mA.
URL: https://global.ieice.org/en_transactions/fundamentals/10.1587/transfun.E93.A.382/_p
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@ARTICLE{e93-a_2_382,
author={Retdian NICODIMUS, Shigetaka TAKAGI, },
journal={IEICE TRANSACTIONS on Fundamentals},
title={Design of Wideband Linear Voltage-to-Current Converters},
year={2010},
volume={E93-A},
number={2},
pages={382-389},
abstract={This paper proposes a voltage-to-current converter with nested feedback loop configuration to achieve high loop gain without reducing the bandwidth. Simulation results using 0.18-µm CMOS process parameters show that the proposed circuit has a good linearity performance. The simulated bandwidth is 350 MHz. The THD improvement of the proposed circuit is more than 60 dB compared to the one of a common gate circuit under a same total current consumption of 10.4 mA.},
keywords={},
doi={10.1587/transfun.E93.A.382},
ISSN={1745-1337},
month={February},}
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TY - JOUR
TI - Design of Wideband Linear Voltage-to-Current Converters
T2 - IEICE TRANSACTIONS on Fundamentals
SP - 382
EP - 389
AU - Retdian NICODIMUS
AU - Shigetaka TAKAGI
PY - 2010
DO - 10.1587/transfun.E93.A.382
JO - IEICE TRANSACTIONS on Fundamentals
SN - 1745-1337
VL - E93-A
IS - 2
JA - IEICE TRANSACTIONS on Fundamentals
Y1 - February 2010
AB - This paper proposes a voltage-to-current converter with nested feedback loop configuration to achieve high loop gain without reducing the bandwidth. Simulation results using 0.18-µm CMOS process parameters show that the proposed circuit has a good linearity performance. The simulated bandwidth is 350 MHz. The THD improvement of the proposed circuit is more than 60 dB compared to the one of a common gate circuit under a same total current consumption of 10.4 mA.
ER -