This paper presents a test vector modification method for reducing average power dissipation during test application for a full-scan circuit. The method first identifies a set of don't care (X) inputs of given test vectors, to which either logic value 0 or 1 can be assigned without losing fault coverage. Then, the method reassigns logic values to the X inputs so as to decrease switching activity of the circuit during scan shifting. Experimental results for benchmark circuits show the proposed method could decrease switching activity of a given test set to 45% of the original test sets in average.
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Seiji KAJIHARA, Koji ISHIDA, Kohei MIYASE, "Average Power Reduction in Scan Testing by Test Vector Modification" in IEICE TRANSACTIONS on Information,
vol. E85-D, no. 10, pp. 1483-1489, October 2002, doi: .
Abstract: This paper presents a test vector modification method for reducing average power dissipation during test application for a full-scan circuit. The method first identifies a set of don't care (X) inputs of given test vectors, to which either logic value 0 or 1 can be assigned without losing fault coverage. Then, the method reassigns logic values to the X inputs so as to decrease switching activity of the circuit during scan shifting. Experimental results for benchmark circuits show the proposed method could decrease switching activity of a given test set to 45% of the original test sets in average.
URL: https://global.ieice.org/en_transactions/information/10.1587/e85-d_10_1483/_p
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@ARTICLE{e85-d_10_1483,
author={Seiji KAJIHARA, Koji ISHIDA, Kohei MIYASE, },
journal={IEICE TRANSACTIONS on Information},
title={Average Power Reduction in Scan Testing by Test Vector Modification},
year={2002},
volume={E85-D},
number={10},
pages={1483-1489},
abstract={This paper presents a test vector modification method for reducing average power dissipation during test application for a full-scan circuit. The method first identifies a set of don't care (X) inputs of given test vectors, to which either logic value 0 or 1 can be assigned without losing fault coverage. Then, the method reassigns logic values to the X inputs so as to decrease switching activity of the circuit during scan shifting. Experimental results for benchmark circuits show the proposed method could decrease switching activity of a given test set to 45% of the original test sets in average.},
keywords={},
doi={},
ISSN={},
month={October},}
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TY - JOUR
TI - Average Power Reduction in Scan Testing by Test Vector Modification
T2 - IEICE TRANSACTIONS on Information
SP - 1483
EP - 1489
AU - Seiji KAJIHARA
AU - Koji ISHIDA
AU - Kohei MIYASE
PY - 2002
DO -
JO - IEICE TRANSACTIONS on Information
SN -
VL - E85-D
IS - 10
JA - IEICE TRANSACTIONS on Information
Y1 - October 2002
AB - This paper presents a test vector modification method for reducing average power dissipation during test application for a full-scan circuit. The method first identifies a set of don't care (X) inputs of given test vectors, to which either logic value 0 or 1 can be assigned without losing fault coverage. Then, the method reassigns logic values to the X inputs so as to decrease switching activity of the circuit during scan shifting. Experimental results for benchmark circuits show the proposed method could decrease switching activity of a given test set to 45% of the original test sets in average.
ER -