1-5hit |
Coupled with the discrete wavelet transform, SPIHT (set partitioning in hierarchical trees) is a highly efficient image compression technique that allows for progressive transmission. One problem, however, is that its decoding can be extremely sensitive to bit errors in the code sequence. In this paper, we address the issue of transmitting SPIHT-encoded images via noisy channels, wherein errors are inevitable. The communication scenario assumed in this paper is that the transmitter cannot get any acknowledgement from the receiver. In our scheme, the original SPIHT code sequence is first segmented into packets. Each packet is classified as either a CP (critical packet) or an RP (refinement packet). For error control, cyclic redundancy check (CRC) is incorporated into each packet. By checking the CRC check sum, the receiver is able to tell whether a packet is correctly received or not. In this way, the noisy channel can be effectively modeled as an erasure channel. For unequal error protection (UEP), each of those packets are repeatedly transmitted for a few times, as determined by a process called diversity allocation (DA). Two DA algorithms are proposed. The first algorithm produces a nearly optimal decoded image (as measured in the expected signal-to-noise ratio). However, its computation cost is extremely high. The second algorithm works in a progressive fashion and is naturally compatible with progressive transmission. Its computation complexity is extremely low. Nonetheless, its decoded image is nearly as good. Experimental results show that the proposed scheme significantly improves the decoded images. They also show that making distinction between CP and RP results in wiser diversity allocation to packets and thus produces higher quality in the decoded images.
Masayoshi NAKAMOTO Kohei SAYAMA Mitsuji MUNEYASU Tomotaka HARANO Shuichi OHNO
For copyright protection, a watermark signal is embedded in host images with a secret key, and a correlation is applied to judge the presence of watermark signal in the watermark detection. This paper treats a discrete wavelet transform (DWT)-based image watermarking method under specified false positive probability. We propose a new watermarking method to improve the detection performance by using not only positive correlation but also negative correlation. Also we present a statistical analysis for the detection performance with taking into account the false positive probability and prove the effectiveness of the proposed method. By using some experimental results, we verify the statistical analysis and show this method serves to improve the robustness against some attacks.
Sunmi KIM Hirokazu TANAKA Takahiro OGAWA Miki HASEYAMA
In this paper, we propose a two-step error concealment algorithm based on an error resilient three-dimensional discrete wavelet transform (3-D DWT) video coding scheme. The proposed scheme consists of an error-resilient encoder duplicating the lowest sub-band bit-streams for dispersive grouped frames and an error concealment decoder. The error concealment method of this decoder is decomposed of two steps, the first step is replacement of erroneous coefficients in the lowest sub-band by the duplicated coefficients, and the second step is interpolation of the missing wavelet coefficients by minimum mean square error (MMSE) estimation. The proposed scheme can achieve robust transmission over unreliable channels. Experimental results provide performance comparisons in terms of peak signal-to-noise ratio (PSNR) and demonstrate increased performances compared to state-of-the-art error concealment schemes.
Peng CAO Chao WANG Longxing SHI
The line-based method has been one of the most commonly-used methods of hardware implementation of two-dimensional (2D) discrete wavelet transform (DWT). However, data buffer is required between the row DWT processor and the column DWT processor to solve the data flow mismatch, which increases the on-chip memory size and the output latency. Since the incompatible data flow is induced from the intrinsic property of adopted lifting-based algorithm, a decomposed lifting algorithm (DLA) is presented by rearranging the data path of lifting steps to ensure that image data is processed in raster scan manner in row processor and column processor. Theoretical analysis indicates that the precision issue of DLA outperforms other lifting-based algorithms in terms of round-off noise and internal word-length. A memory-efficient and high-performance line-based architecture is proposed based on DLA without the implementation of data buffer. For an N M image, only 2N internal memory is required for 5/3 filter and 4N of that is required for 9/7 filter to perform 2D DWT, where N and M indicate the width and height of an image. Compared with related 2D DWT architectures, the size of on-chip memory is reduced significantly under the same arithmetic cost, memory bandwidth and timing constraint. This design was implemented in SMIC 0.18 µm CMOS logic fabrication with 32 kbits dual-port RAM and 20 K equivalent 2-input NAND gates in a 1.00 mm 1.00 mm die, which can process 512 512 image under 100 MHz.
Win-Bin HUANG Alvin W. Y. SU Yau-Hwang KUO
Set Partitioning in Hierarchical Trees (SPIHT) is a highly efficient technique for compressing Discrete Wavelet Transform (DWT) decomposed images. Though its compression efficiency is a little less famous than Embedded Block Coding with Optimized Truncation (EBCOT) adopted by JPEG2000, SPIHT has a straight forward coding procedure and requires no tables. These make SPIHT a more appropriate algorithm for lower cost hardware implementation. In this paper, a modified SPIHT algorithm is presented. The modifications include a simplification of coefficient scanning process, a 1-D addressing method instead of the original 2-D arrangement of wavelet coefficients, and a fixed memory allocation for the data lists instead of a dynamic allocation approach required in the original SPIHT. Although the distortion is slightly increased, it facilitates an extremely fast throughput and easier hardware implementation. The VLSI implementation demonstrates that the proposed design can encode a CIF (352288) 4:2:0 image sequence with at least 30 frames per second at 100-MHz working frequency.