A readout circuit incorporating a pixel-level analog-to-digital converter (ADC) is studied for 2-dimensional microbolometer infrared focal plane arrays (IRFPAs). The integration time and signal-to-noise ratio (SNR) is improved using the current-mode bias and MSB skimming. The proposed pixel-level ADC is a two-step configuration, so its power consumption is very low. The readout circuit was designed using a 0.35 µm 2-poly 4-metal CMOS process for a 320240 microbolometer array with a pixel size of 35µm35µm. The noise equivalent temperature difference (NETD) was estimated to be 47 mK, with a power consumption of 390 nW for a pixel-level ADC.

A new readout integrated circuit is developed for application in an amorphous silicon-based microbolometer array with a pixel pitch of 35 µm. The proposed circuit lowers the power dissipation for a pixel-level analog-to-digital converter (ADC), which uses a comparator and a counter for its data conversion. The infrared current of a microbolometer is proportional to the resistivity changes of the microbolometer. Thus, the required number of counter operations for the pixel ADC can be determined according to the microbolometer current variation. The counting number precisely determines how much infrared flux is absorbed. A 14 bit counter should normally be used for the pixel ADC for this kind of operation. However, when the proposed current skimming scheme is adopted, the total bits for the counter in the pixel ADC can be reduced to 12 bits. Due to the proposed mechanism, the required operational speed of the comparator can lower than that of a conventional circuit. Consequently, the overall power dissipation in the comparator and counter is less than that of a conventional structure. This low power approach is very suitable in the pixel-level ADCs of microbolometers.