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[Author] Dominik STOFFEL(1hit)

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  • AND/OR Reasoning Graphs for Determining Prime Implicants in Multi-Level Combinational Networks*

    Dominik STOFFEL  Wolfgang KUNZ  Stefan GERBER  

     
    PAPER-VLSI Design Technology and CAD

      Vol:
    E80-A No:12
      Page(s):
    2581-2588

    This paper presents a technique to determine prime implicants in multi-level combinational networks. The method is based on a graph representation of Boolean functions called AND/OR reasoning graphs. This representation follows from a search strategy to solve the satisfiability problem that is radically different from conventional search for this purpose (such as exhaustive simulation, backtracking, BDDs). The paper shows how to build AND/OR reasoning graphs for arbitrary combinational circuits and proves basic theoretical properties of the graphs. It will be demonstrated that AND/OR reasoning graphs allow us to naturally extend basic notions of two-level switching circuit theory to multi-level circuits. In particular, the notions of prime implicants and permissible prime implicants are defined for multi-level circuits and it is proved that AND/OR reasoning graphs represent all these implicants. Experimental results are shown for PLA factorization.