This paper describes a new simulation-based design methodology for process and device development of submicron MOS VLSIs. The main purpose of this work is to bridge the gap between simulations and actual experimental data through a transformation of the RSF (Response Surface Function) which determines a quadratic relationship between measured device characteristics and process conditions. To achieve the reliable RSF, we have developed two key techniques: (1) Transformation of variable and response before application of the RSM (Response Surface Method) design by simulations. (2) Improvement of the RSF which is determined by process and device simulations, by using the measured data of MOSFET characteristics. The new design methodology is applied to obtain RSFs having good device threshold voltage and maximum drain current. MOS devices fabricated with an experimental 0.8 µm technology are utilized to verify the results. The device parameters are 11-20 nm for the gate oxide thickness, and 0.8-4.0 µm for the gate length. The averaged RMS errors between the obtained RSF and the experimental data are 0.02 V for the threshold voltage and 1.46 % for the maximum drain current. A quantitative explanation on the effect of the transformation technique is given.