1-2hit |
Jinseok KONG Pen-Chung YEW Gyungho LEE
Directory-based cache coherence schemes are commonly used in large-scale shared-memory multiprocessors, but most of them rely on heuristics to avoid large hardware requirements. We proposed using physical address mapping on directories to significantly reduce directory size needed. This approach allows the size of directory to grow as O(cn log2 n) as in optimal pointer-based directory schemes [11], where n is the number of nodes in the system and c is the number of cache lines in each cache memory. Performance aspects of the proposed scheme are studied in detail using simulation.
Performance of three binding schemes for memory local to a node is evaluated. Since a large number of cache misses can occur in a large (relative to the cache size) working set, binding at a page fault time alone cannot efficiently utilize locality of reference at the local memory. In a small working set, the address bound to the local memory at a node miss time is not effective due to low cache miss rates. Our simulation shows that binding at a cache miss time achieves up to 3.1 times and 2.4 times performance of the schemes of binding at a page fault time and at a node miss time respectively.