The paper proposes a constant bit rate (CBR) control algorithm for motion JPEG2000 (MJ2). In MJ2 coding, every frame can be coded at similar target bitrate due to the accurate rate control feature. Moreover, frames of the same scene have the similar rate-distortion (RD) characters. The proposed method estimates the initial cutoff threshold of the current frame according to the previous frame's RD information. This iterative method reduces computational cost significantly. As opposed to previous algorithms, it can be used at any compression ratio. Experiments show that the performance is comparable to normal JPEG2000 coding.

This paper proposes two efficient rate control algorithms for Motion JPEG2000. Both methods provide accurate visual quality control under buffer constraints. Frames of the same scene usually have the similar rate-distortion (R-D) characters. The proposed methods predict the R-D models of uncoded frames forwardly or bilaterally according to those of coded frames. Experimental results demonstrate that the proposed algorithms offer visual quality improvements over similar competing methods and save a large amount of memory simultaneously.

Dependent Quantization (DQ) is a new quantization tool introduced in the Versatile Video Coding (VVC) standard. While it provides better rate-distortion calculation accuracy, it also increases the computational complexity and hardware cost compared to the widely used scalar quantization. To address this issue, this paper proposes a parallel-dependent quantization hardware architecture using Verilog HDL language. The architecture preprocesses the coefficients with a scalar quantizer and a high-frequency filter, and then further segments and processes the coefficients in parallel using the Viterbi algorithm. Additionally, the weight bit width of the rate-distortion calculation is reduced to decrease the quantization cycle and computational complexity. Finally, the final quantization of the TU is determined through sequential scanning and judging of the rate-distortion cost. Experimental results show that the proposed algorithm reduces the quantization cycle by an average of 56.96% compared to VVC’s reference platform VTM, with a Bjøntegaard delta bit rate (BDBR) loss of 1.03% and 1.05% under the Low-delay P and Random Access configurations, respectively. Verification on the AMD FPGA development platform demonstrates that the hardware implementation meets the quantization requirements for 1080P@60Hz video hardware encoding.