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Clinton KUO Mark WEIDNER Thomas TOMS Henry CHOE Ko-Min CHANG Ann HARWOOD Joseph JELEMENSKY Philip SMITH
A 512-kb flash EEPROM developed for microcontroller applications will be reported. Many process and performance constraints associated with the conventional flash EEPROM have been eliminated through the development of a new flash EEPROM cell and new circuit techniques. Design of the 512-kb flash EEPROM, which is programmable for different array sizes, has been evaluated from 256- and 384-kb arrays embedded in new 32-b microcontrollers. The 512-kb flash EEPROM has incorporated the newly developed source-coupled split-gate (SCSG) flash EEPROM cell, Zener-diode controlled programming voltages, internally generated erase voltage, and a new differential sense amplifier. It has eliminated overerase and program disturb problems without relying on tight process controls and on critical operational sequences and timings, such as intelligent erase, intelligent program, and preprogram before erase. A modular approach was used for chip design to minimize development time and for processing technology to achieve high manufacturability and flexibility.