Many switching networks are currently designed to support ATM architectures. In this letter, we propose the performance improvement of a network called hybrid dilated banyan network with bypasses at the stage of 42 re-arrangeable output switch. Our letter also includes the performance analysis of the improved hybrid dilated banyan network.

Banyan networks and their improved switches such as 2-dilated banyan networks are usually constructed by a self-routing mechanism, and provide a high multiplexing transmission capacity to ATM networks. Due to cell blocking in the switching elements in these banyan networks, however, cell loss is occurred and then the throughput of each network is decreased. To improve this problem, we have introduced bypasses to the original and the 2-dilated banyan networks. This paper focuses on the position of the bypasses in these banyan networks and proposes the one-bypass-connection methods in order to minimize cell transfer delay caused by the bypasses. We also analyze output rate of each network and show that the bypass method gives network designers flexible selections for network performance and transfer delay.

Banyan networks are used in multiprocessor computer applications for an ATM switching. In this paper, we study the continuous blocking of the first n-stage which makes the performance of the banyan networks decrease. We use the 2-dilated banyan networks into the banyan networks to remove the continuous blocking of the first n-stage. We call the new networks as the hybrid dilated banyan networks. We explain how to analyze the throughput of this networks at each stage. Based on the analysis of input rate and output rate at each stage, we can design the hybrid dilated banyan networks with the desirable output rate. The result of analysis shows the hybrid dilated banyan networks have higher performance and feasibility than the banyan networks.