This paper presents a new architecture of a high-speed ATM switch. The switch, called FSM (Factorial Style Memory) switch, uses Dual-Port memories to construct a factorial style memory for eliminating the bus contention problem. In order to fit the various applications, based on the proposed switch architecture, several kinds of models are also proposed to construct the larger size of switches. With the same required throughput and cell loss probability, the performance analysis of the switch shows that the number of buffers and average cell delay can be significantly reduced in the proposed switch while comparing to the ATM switches with central shared memory. For satisfying applications that require larger switches, three types of expansion methods which contain size expansion, memory expansion, and size-memory combined expansion are discussed.