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[Author] Metehan OZCAN(1hit)

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  • Synthesis of Serial Local Clock Controllers for Asynchronous Circuit Design

    Nattha SRETASEREEKUL  Hiroshi SAITO  Euiseok KIM  Metehan OZCAN  Masashi IMAI  Hiroshi NAKAMURA  Takashi NANYA  

     
    PAPER-IP Design

      Vol:
    E86-A No:12
      Page(s):
    3028-3037

    Asynchronous controllers effectively control high concurrence of datapath operations for high speed. Signal Transition Graphs (STGs) can effectively represent these concurrent events. However, highly concurrent STGs cause the state explosion problem in asynchronous synthesis tools. Many small but highly concurrent STGs cannot be synthesized to obtain control circuits. Moreover, STGs also lead to some control-time overhead of the four-phase handshake protocol. In this paper, we propose a method for deriving the serial control nodes from Control Data Flow Graphs (CDFGs) such that the concurrence of datapath operations is still preserved. The STGs derived from the serialized control nodes are serial STGs which are simpler for synthesis than the concurrent STGs. We also propose an implementation using these serialized controllers to generate local clocks at any necessary times. The implementation results in very small control-time overhead. The experimental results show that the number of synthesis states is proportional to the number of control signals, and the circuits with satisfiable small control-time overhead are obtained.