1-1hit |
Hiroaki MYOREN Mitsunori NAKAMURA Takeshi IIZUKA Susumu TAKADA
We present a digital double relaxation oscillation SQUID (DROS) with a digital flux-locked-loop (FLL) circuit consisting of an up/down counter and a digital-to-analog (D/A) converter. The up/down counter was designed using 4 jucntion logic (4JL) gates operated with a 2-phase power system. The D/A converter was designed using an R-2R ladder-type D/A converter. We simulated the dynamic behavior of the digital DROS with a digital FLL circuit combined with the 5-bit ripple up/down counter and the D/A converter. Simulation results show correct flux-locked behavior and a high slew rate of 107Φ0/s for the digital DROS.