The three-dimensional chip-stacked CSP, which started with a flash/SRAM combination memory for cellular phones, was the forerunner from which 3D system packages realize full-scale capability. In the future, 3D package technology will act as a savior in achieving greater shrink of silicon processes--whose limits have come into sight. As SIP, it will surpass SOC, and, as the core technology of electronic equipment for our high-speed digital network society, it is expected to lead the way into the first period of the 21st century. Today, we are seeing the signs of this transition.