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[Author] Phakphoom BOONYANANT(1hit)

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  • Design and Multiplier-Free Realization of Predictive-Encoded FIR Filters Using Karmarkar's LP Algorithm

    Phakphoom BOONYANANT  Sawasd TANTARATANA  

     
    PAPER-Digital Signal Processing

      Vol:
    E85-A No:1
      Page(s):
    198-209

    This paper considers FIR filter design using linear predictive coding technique, for which the coefficients belong to a small set of integers, so that the coefficients have small wordlengths. Previously, integer programming was used to find the coefficients of such filters. However, the design method using integer programming suffers from high computational cost as the filter length increases. The computation can quickly become prohibition. In this paper, we propose two designs of predictive encoded FIR filters based on a modified Karmarkar's linear programming algorithm, which is known to be more suitable for solving large problems. First, we formulate the problem as a weighted minimax error problem and arrange it in a form that the modified Karmarkar algorithm can be applied. The design algorithm has the same (low) complexity as that of the weighted least-square method, but it can solve problems with some constraints, whereas the weighted least-square method cannot. However, the algorithm has a difficulty due to an ill condition caused by matrix inversion when the predictive filter order is high. To avoid this difficulty, we formulate the design as a weighted least absolute error problem. By using this second proposed algorithm, a filter with shorter coefficient wordlength can be found using a higher-order predictor filter at the expense of more computational cost. To further reduce the coefficient wordlength, the filter impulse response is separated into two sections having different ranges of coefficient values. Each section uses a different scaling factor to scale the coefficient values. With small coefficient wordlength, the filter can be realized without hardware multipliers using a low-radix signed-digit number representation. Each coefficient is distributed in space as 2-3 ternary {0,1} or quinary {0,1, 2} coefficients. Ternary coefficients require only add/subtract operation, while quinary coefficients require one-bit shift and add/subtract operations. The shift can be hardwired without any additional hardware.