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Ryo SHIBATA Gou HOSOYA Hiroyuki YASHIMA
In racetrack memories (RM), a position error (insertion or deletion error) results from unstable data reading. For position errors in RM with multiple read-heads (RHs), we propose a protograph-based LDPC coded system specified by a protograph and a protograph-aware permutation. The protograph-aware permutation facilitates the design and analysis of the coded system. By solving a multi-objective optimization problem, the coded system attains the properties of fast convergence decoding, a good decoding threshold, and a linear minimum distance growth. In addition, the coded system can adapt to varying numbers of RHs without any modification. The asymptotic decoding thresholds with a limited number of iterations verify the good properties of the system. Furthermore, for varying numbers of RHs, the simulation results with both small and large number of iterations, exhibit excellent decoding performances, both with short and long block lengths, and without error floors.
Ryo SHIBATA Gou HOSOYA Hiroyuki YASHIMA
Racetrack memory (RM) has attracted much attention. In RM, insertion and deletion (ID) errors occur as a result of an unstable reading process and are called position errors. In this paper, we first define a probabilistic channel model of ID errors in RM with multiple read-heads (RHs). Then, we propose a joint iterative decoding algorithm for spatially coupled low-density parity-check (SC-LDPC) codes over such a channel. We investigate the asymptotic behaviors of SC-LDPC codes under the proposed decoding algorithm using density evolution (DE). With DE, we reveal the relationship between the number of RHs and achievable information rates, along with the iterative decoding thresholds. The results show that increasing the number of RHs provides higher decoding performances, although the proposed decoding algorithm requires each codeword bit to be read only once regardless of the number of RHs. Moreover, we show the performance improvement produced by adjusting the order of the SC-LDPC codeword bits in RM.
In this letter, we study low-density parity-check (LDPC) codes for noisy channels with insertion and deletion (ID) errors. We first propose a design method of irregular LDPC codes for such channels, which can be used to simultaneously obtain degree distributions for different noise levels. We then show the asymptotic/finite-length decoding performances of designed codes and compare them with the symmetric information rates of cascaded ID-noisy channels. Moreover, we examine the relationship between decoding performance and a code structure of irregular LDPC codes.
Ryo SHIBATA Gou HOSOYA Hiroyuki YASHIMA
Over the past two decades, irregular low-density parity-check (LDPC) codes have not been able to decode information corrupted by insertion and deletion (ID) errors without markers. In this paper, we bring to light the existence of irregular LDPC codes that approach the symmetric information rates (SIR) of the channel with ID errors, even without markers. These codes have peculiar shapes in their check-node degree distributions. Specifically, the check-node degrees are scattered and there are degree-2 check nodes. We propose a code construction method based on the progressive edge-growth algorithm tailored for the scattered check-node degree distributions, which enables the SIR-approaching codes to progress in the finite-length regime. Moreover, the SIR-approaching codes demonstrate asymptotic and finite-length performance that outperform the existing counterparts, namely, concatenated coding of irregular LDPC codes with markers and spatially coupled LDPC codes.
Ryo SHIBATA Gou HOSOYA Hiroyuki YASHIMA
We propose a coding/decoding strategy that surpasses the symmetric information rate of a binary insertion/deletion (ID) channel and approaches the Markov capacity of the channel. The proposed codes comprise inner trellis codes and outer irregular low-density parity-check (LDPC) codes. The trellis codes are designed to mimic the transition probabilities of a Markov input process that achieves a high information rate, whereas the LDPC codes are designed to maximize an iterative decoding threshold in the superchannel (concatenation of the ID channels and trellis codes).
Ryo SHIBATA Gou HOSOYA Hiroyuki YASHIMA
For insertion and deletion channels, there are many coding schemes based on low-density parity-check (LDPC) codes, such as spatially coupled (SC) LDPC codes and concatenated codes of irregular LDPC codes and markers. However, most of the previous works have problems, such as poor finite-length performance and unrealistic settings for codeword lengths and decoding iterations. Moreover, when using markers, the decoder receives log-likelihood (LLR) messages with different statistics depending on code bit position. In this paper, we propose a novel concatenation scheme using protograph-based LDPC code and markers that offers excellent asymptotic/finite-length performance and a structure that controls the irregularity of LLR messages. We also present a density evolution analysis and a simple optimization procedure for the proposed concatenated coding scheme. For two decoding scenarios involving decoding complexity, both asymptotic decoding thresholds and finite-length performance demonstrate that the newly designed concatenated coding scheme outperforms the existing counterparts: the irregular LDPC code with markers, the SC-LDPC code, and the protograph LDPC code, which is optimized for an additive white Gaussian noise channel, with markers.