This paper describes the relation between the structure and the capability on mesh-connected computers with orthogonal broadcasting. It is shown that algorithms of maximum finding for the two-way communication model can be performed on the one-way communication model without increasing the time complexity.

A recursive-type positive integer code is proposed. It prefixes the information about the length of the component of the codeword recursively. It is an asymptotically optimal code. The codeword length for a positive integer n is shorter than n bits in almost all of sufficiently large positive integers, where n is the log-star function.

A positive integer code EXEb,h,d(b1, h1,d0) is proposed. Its codeword for a positive integer n consists of three kinds of information: (1) how many times the number of n's digits can be subtracted by the terms of a progression including a geometric progression, (2) the rest of the subtractions, and (3) given value of the positive integer n. EXEb,h,d is a non-recursive type code. It is an asymptotically optimal code (for d1) and preserves the lexicographic,length, and number orders (for bh+2). Some examples of EXEb,h,d are also presented. Their codeword lengths are found to be shorter than the Amemiya and Yamamoto code CEk except for small positive integers.

This paper describes an adaptive neural vector quantization algorithm with a deleting approach of weight (reference) vectors. We call the algorithm an adaptive learning and self-deleting algorithm. At the beginning, we introduce an improved topological neighborhood and an adaptive vector quantization algorithm with little depending on initial values of weight vectors. Then we present the adaptive learning and self-deleting algorithm. The algorithm is represented as the following descriptions: At first, many weight vectors are prepared, and the algorithm is processed with Kohonen's self-organizing feature map. Next, weight vectors are deleted sequentially to the fixed number of them, and the algorithm processed with competitive learning. At the end, we discuss algorithms with neighborhood relations compared with the proposed one. The proposed algorithm is also good in the case of a poor initialization of weight vectors. Experimental results are given to show the effectiveness of the proposed algorithm.

A noise tolerant auto-correlation associative memory is proposed. An associated energy function is formed by a multiplication of plural Hopfield's energy functions each of which includes single pattern as its energy minimum. An asynchronous optimizing algorithm of the whole energy function is also presented based on the binary neuron model. The advantages of this new associative memory are that the orthogonality relation among patterns does not need to be satisfied and each stored pattern has a large basin of attraction around itself. The computer simulations show a fairly good performance of associative memory for arbitrary pattern vectors which are not orthogonal to each other.

To enhance fabrication yield for processor arrays, many reconfiguration schemes for replacing faulty processing elements (PE's) with spare PE's have been proposed. An array grid model based on single-track switches is one of such models. For this model, some algorithms for reconfiguring processor arrays have been proposed. However, any algorithm which can reconfigure the array, whenever the array is reconfigurable, has not been proposed as yet. This paper describes reconfiguration methods of processor arrays with faulty PE's. The methods use indirect replacements for reconfiguring arrays. First, we introduce a concept of fatal fault pattern, which makes an array unreconfigurable. Then, for the reconfiguration method with fixed spare arrangement, efficient spare arrangements are given by evaluating the probability of an occurring fatal fault pattern. Furher, we present reconfiguration algorithm with relocating spare. In the algorithm, fatal fault patterns are eliminated by relocating spare. Computer simulations show that the method has good performance of reconfiguration.

To enhance fabrication yield for processor arrays, many reconfiguration schemes for replacing faulty processing elements (PE's) with spare PE's have been proposed. An array grid model based on single-tracks is one of such models. For this model, some algorithms for reconfiguring processor arrays have been proposed. However, an algorithm which can reconfigure the array, whenever the array is reconfigurable, has not been proposed yet. This paper presents two types of methods for reconfiguration of processor arrays. Both the types use indirect replacements for reconfiguring arrays. For an indirect replacement of a faulty non-spare PE, one has a fixed direction, the other has at most four directions among which one is chosen. For the former, we consider the several distribution of spare PE's, and computer simulations show a tendency in the term of difference in the distributions. The latter algorithms consist of two phases. In the first phase, rows and columns of spare PE's are decided in accordance with a rule. Several rules for deciding spare PE's are considered in this paper. In the second phase, faulty non-spare PE's are replaced with healthy spare PE's. By simulations the performance of the algorithms are evaluated and a tendency is shown in the terms of difference in disposition of spare PE's.

It is known that homogeneous networks are ones which perform parallel algorithms, and the dynamics of neural networks are applied to practical problems including combinatorial optimization problems. Both homogeneous and neural networks are parallel networks, and are composed of Boolean elements. Although a large number of studies have been made on the applications of homogeneous threshold networks, little is known about the relation of the dynamics of these networks. In this paper, some results about the dynamics, used to find the lengths of periodic and transient sequences, as built by parallel networks including threshold and homogeneous networks are shown. First, we will show that for non–restricted parallel networks, threshold networks which permit only two elements to transit at each step, and homogeneous networks, it is possible to build periodic and transient sequences of almost any lengths. Further, it will be shown that it is possible for triangular threshold networks to build periodic and transient sequences with short lengths only. As well, homogeneous threshold networks also seem to build periodic and transient sequences with short lengths only. Specifically, we will show a sufficient condition for symmetric homogeneous threshold networks to have periodic sequences with the length 1.