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[Author] Satoshi KAZAMA(2hit)

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  • Estimation of Current and Voltage Distributions by Scanning Coupling Probe

    Satoshi KAZAMA  Shinichi SHINOHARA  Risaburo SATO  

     
    PAPER-EMC Measurement and Test

      Vol:
    E83-B No:3
      Page(s):
    460-466

    This paper describes a method for estimating current and voltage distributions by scanning with a probe. The method takes advantage of the phenomenon that the coupling between the current and the probe varies with the direction of the probe. The current and voltage are estimated by calculating the probe vector output for each of four directions. Both the current and voltage vector distributions can thus be estimated at the same time by using a single probe. The estimated distributions in a digital IC package and a microstrip line showed that this method produces reliable results. The simple structure of the probe should make it easy to reduce its size.

  • Design and Implementation of a Low-Power Multiple-Valued Current-Mode Integrated Circuit with Current-Source Control

    Takahiro HANYU  Satoshi KAZAMA  Michitaka KAMEYAMA  

     
    PAPER-Multiple-Valued Architectures

      Vol:
    E80-C No:7
      Page(s):
    941-947

    A new multiple-valued current-mode (MVCM) integrated circuit using a switched current-source control technique is proposed for a 1.5 V-supply high-speed arithmetic circuit with low-power dissipation. The use of a differential logic circuit (DLC) with a pair of dual-rail inputs makes the input voltage swing small, which results in a high driving capability at a lower supply voltage, while having large static power dissipation. In the proposed DLC using a switched current control technique, the static power dissipation can be greatly reduced because current sources in non-active circuit blocks are turned off. Since the gate of each current source is directly controlled by using a multiphase clock whose technique has been already used in dynamic circuit design, no additional transistors are required for currentsource control. As a typical example of arithmetic circuits, a new 1.5 V-supply 5454-bit multiplier based on a 0.8µm standard CMOS technology is also designed. Its performance is about 1.3 times faster than that of a binary fastest multiplier under the normalized power dissipation. A prototype chip is also fabricated to confirm the basic operation of the proposed MVCM integrated circuit.