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[Author] Satoshi YAMANE(6hit)

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  • Practical Evaluation of Online Heterogeneous Machine Learning

    Kazuki SESHIMO  Akira OTA  Daichi NISHIO  Satoshi YAMANE  

     
    PAPER-Artificial Intelligence, Data Mining

      Pubricized:
    2020/08/31
      Vol:
    E103-D No:12
      Page(s):
    2620-2631

    In recent years, the use of big data has attracted more attention, and many techniques for data analysis have been proposed. Big data analysis is difficult, however, because such data varies greatly in its regularity. Heterogeneous mixture machine learning is one algorithm for analyzing such data efficiently. In this study, we propose online heterogeneous learning based on an online EM algorithm. Experiments show that this algorithm has higher learning accuracy than that of a conventional method and is practical. The online learning approach will make this algorithm useful in the field of data analysis.

  • Symbolic Reachability Analysis of Probabilistic Linear Hybrid Automata

    Yosuke MUTSUDA  Takaaki KATO  Satoshi YAMANE  

     
    PAPER

      Vol:
    E88-A No:11
      Page(s):
    2972-2981

    We can model embedded systems as hybrid systems. Moreover, they are distributed and real-time systems. Therefore, it is important to specify and verify randomness and soft real-time properties. For the purpose of system verification, we formally define probabilistic linear hybrid automaton and its symbolic reachability analysis method. It can describe uncertainties and soft real-time characteristics.

  • Enhanced Full Attention Generative Adversarial Networks

    KaiXu CHEN  Satoshi YAMANE  

     
    LETTER-Core Methods

      Pubricized:
    2023/01/12
      Vol:
    E106-D No:5
      Page(s):
    813-817

    In this paper, we propose improved Generative Adversarial Networks with attention module in Generator, which can enhance the effectiveness of Generator. Furthermore, recent work has shown that Generator conditioning affects GAN performance. Leveraging this insight, we explored the effect of different normalization (spectral normalization, instance normalization) on Generator and Discriminator. Moreover, an enhanced loss function called Wasserstein Divergence distance, can alleviate the problem of difficult to train module in practice.

  • FOREWORD

    Satoshi YAMANE  

     
    FOREWORD

      Vol:
    E91-A No:11
      Page(s):
    3206-3206
  • Model Checking of Real-Time Properties for Embedded Assembly Program Using Real-Time Temporal Logic RTCTL and Its Application to Real Microcontroller Software

    Yajun WU  Satoshi YAMANE  

     
    PAPER-Software System

      Pubricized:
    2020/01/06
      Vol:
    E103-D No:4
      Page(s):
    800-812

    For embedded systems, verifying both real-time properties and logical validity are important. The embedded system is not only required to the accurate operation but also required to strictly real-time properties. To verify real-time properties is a key problem in model checking. In order to verify real-time properties of assembly program, we develop the simulator to propose the model checking method for verifying assembly programs. Simultaneously, we propose a timed Kripke structure and implement the simulator of the robot's processor to be verified. We propose the timed Kripke structure including the execution time which extends Kripke structure. For the input assembly program, the simulator generates timed Kripke structure by dynamic program analysis. Also, we implement model checker after generating timed Kripke structure in order to verify whether timed Kripke structure satisfies RTCTL formulas. Finally, to evaluate a proposed method, we conduct experiments with the implementation of the verification system. To solve the real problem, we have experimented with real microcontroller software.

  • Model Checking of Embedded Assembly Program Based on Simulation

    Satoshi YAMANE  Ryosuke KONOSHITA  Tomonori KATO  

     
    PAPER-Software Engineering

      Pubricized:
    2017/05/12
      Vol:
    E100-D No:8
      Page(s):
    1819-1826

    Embedded systems have been widely used. In addition, embedded systems have been gradually complicated. It is important to ensure the safety for embedded software by software model checking. We have developed a verification system for verifying embedded assembly programs. It generates exact Kripke structure by exhaustively and dynamically simulating assembly programs, and simultaneously verify it by model checking. In addition, we have introduced undefined values to reduce the number of states in order to avoid the state space explosion.