We propose an instruction-based variable priority scheme (IBVPS) which achieves high sustained memory throughput on a TCMP type vector supercomputer. Generally, there are two approaches to arbitrating interprocessor memory access conflict: request level priority control and fixed priority control. Each approach, however, affects performance in its own way: In the case of request level priority control, mutual obstruction causes a performance degradation, and in the case of fixed priority control, memory bank monopoly causes a performance degradation. Mutual obstruction refers to the interference among access requests coming from different instructions; memory bank monopoly refers to the un-interrupted accessing of the same memory bank by a series of higher priority instructions. The strategy of the instruction-based variable priority scheme consists in: (a) generally changing the priority assignment of all load/store pipelines at the end of any instruction running in the system, and (b) changing the priority assignment of all load/store pipelines more than once in the middle of an access instruction with a stride greater than 1 or an indirect access instruction which may monopolize some memory banks for an extended period of time. This strategy reduces mutual obstruction because the priority assignment is reshuffled for the entire group of load/store pipelines at a time. it also reduces memory bank monopoly because the opportunity for memory access is made equal among different instructions by changing the priority assignment at the end of an instruction. Moreover, it prevents the memory bank monopoly by a memory access instruction with a stride greater than 1 or an indirect access instruction, by changing the priority assignment more frequently. Consequently, high sustained memory throughput is achieved on TCMP type vector supercomputers.

We present a scalable parallel memory architecture with a skew scheme by which permanent-concentration-free strides, if any, do not depend on the number of ways in parallel memory interleaving. The permanent-concentration is a kind of memory access conflict. With conventional skew schemes, permanent-concentration-free strides depended on the number of banks (or bank groups) in parallel memory (=number of ways in parallel memory interleaving). We analyze two kinds of cause of conflicts: permanent-concentration occurs when memory access requests concentrate in limited number of banks (or bank groups) in parallel memory, and transient-concentration, when memory access requests transiently concentrate in some banks (or bank groups) in parallel memory. We have identified permanent-concentration-free strides, which are independent of the number of banks (or bank groups) in parallel memory, by solving two concentrations separately. The strategy is to increase the size of address block of shifting address assignment to the parallel memory in order to reduce permanent-concentrations, and make the size of the buffer for each banks (or bank groups) in the parallel memory match the size of address block of shifting in order to absorb transient-concentrations. The skew scheme uses the same size of address block of shifting address assignment for memory systems for different numbers of banks (or bank groups) in parallel memory. As a result, scalability for permanent-concentration-free strides is achieved independent of the number of banks (or bank groups) in parallel memory.