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Seiji MOCHIZUKI Katsushige MATSUBARA Keisuke MATSUMOTO Chi Lan Phuong NGUYEN Tetsuya SHIBAYAMA Kenichi IWATA Katsuya MIZUMOTO Takahiro IRITA Hirotaka HARA Toshihiro HATTORI
A 197mW 70ms-latency Full-HD 12-channel video-processing SoC for in-vehicle information systems has been implemented in 16nm CMOS. The SoC integrates 17 video processors of 6 types to operate video processing independently of other processing in CPU/GPU. The synchronous scheme between the video processors achieves 70ms low-latency for driver assistance. The optimized implementation of lossy and lossless video-data compression reduces memory access data by half and power consumption by 20%.