The search functionality is under construction.
The search functionality is under construction.

Author Search Result

[Author] Won-Ho LEE(1hit)

1-1hit
  • Design of Low Power QPP Interleave Address Generator Using the Periodicity of QPP

    Won-Ho LEE  Chong Suck RIM  

     
    LETTER-VLSI Design Technology and CAD

      Vol:
    E92-A No:6
      Page(s):
    1538-1540

    This paper presents two power-saving designs for Quadratic Polynomial Permutation (QPP) interleave address generator of which interleave length K is fixed and unfixed, respectively. These designs are based on our observation that the quadratic term f2x2%K of f(x) = (f1x+f2x2)%K, which is the QPP address generating function, has a short period and is symmetric within the period. Power consumption is reduced by 27.4% in the design with fixed-K and 5.4% in the design with unfixed-K on the average for various values of K, when compared with existing designs.