Buffer management and delivery latency in various networks have been extensively studied. However, little work has considered the condition in which the traffic exhibits interpacket dependency, a common occurrence with many applications. Furthermore, the existing work related to such traffic mainly focuses on maximizing goodput and little attention has been paid to delivery latency. This paper concentrates on the delivery latency minimization problem for streaming data with packet dependencies. A novel optimization model is proposed to describe the aforementioned problem and the theoretical lower bound for delivery latency is deduced. Based on this model, a plain buffer management (PBM) algorithm is applied to the implementation of the buffer scheduling process. Afterwards, we improve the PBM algorithm under the guidance of a heuristic idea and put forward an optimal buffer management greedy (OBMG) algorithm. Experiments demonstrate that the OBMG algorithm outperforms the currently best known online (BKO) algorithm as it decreases the average delivery latency by 35.6%. In some cases, delivery latency obtained from the OBMG algorithm can be quite close to the theoretical lower bound. In addition, the OBMG algorithm can reduce CPU computational overhead by more than 12% in comparison to the BKO algorithm.

Montgomery modular multiplication is one of the most efficient algorithms for modular multiplication of large integers. On resource-constraint embedded processors, memory-access operations play an important role as arithmetic operations in the modular multiplication. To improve the efficiency of Montgomery modular multiplication on embedded processors, this paper concentrates on reducing the memory-access operations through adding a few working registers. We first revisit previous popular Montgomery modular multiplication algorithms, and then present improved algorithms for Montgomery modular multiplication and squaring for arbitrary prime fields. The algorithms adopt the general ideas of hybrid multiplication algorithm proposed by Gura and lazy doubling algorithm proposed by Lee. By careful optimization and redesign, we propose novel implementations for Montgomery multiplication and squaring called coarsely integrated product and operand hybrid scanning algorithm (CIPOHS) and coarsely integrated lazy doubling algorithm (CILD). Then, we implement the algorithms on general MIPS64 processor and OCTEON CN6645 processor equipped with specific multiply-add instructions. Experiments show that CIPOHS and CILD offer the best performance both on the general MIPS64 and OCTEON CN6645 processors. But the proposed algorithms have obvious advantages for the processors with specific multiply-add instructions such as OCTEON CN6645. When the modulus is 2048 bits, the CIPOHS and CILD outperform the CIOS algorithm by a factor of 47% and 58%, respectively.