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[Author] Yoshinobu NAKAMURA(2hit)

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  • Dependence of Motion of Breaking Arc on Contact Separating Speed for Ag and Pd Contact Pairs in a DC42V Resistive Circuit

    Yoshinobu NAKAMURA  Junya SEKIKAWA  Takayoshi KUBONO  

     
    PAPER-Arc Discharge & Related Phenomena

      Vol:
    E90-C No:7
      Page(s):
    1361-1368

    Ag and Pd electrical contact pairs are separated at constant separating speeds (5, 10 and 20 mm/s) in a DC 42 V/8.4 A resistive circuit. The motion of the breaking arc is observed with a high-speed video camera. For Ag contacts, the motion of the breaking arc becomes stable at a certain critical gap at separating speeds of 10 mm/s and 20 mm/s, and the breaking arc moves extensively at the separating speed of 5 mm/s. For Pd contacts, the breaking arc moves extensively regardless of the separating speed. These results are attributed to the following causes. For Ag contacts, the difference in the motion of arc spots at each separating speed is changed by the difference in the total energy input to the contacts. For Pd contacts, the temperature of the contact surfaces is kept high because of the lower thermal conductivity of Pd than Ag.

  • Analysis of the Relation between Chip Rate and Capacity in DS/CDMA Cellular Systems Considering Adjacent Channel Interference

    Kouta KINOSHITA  Hiroyuki ATARASHI  Yoshihiro ISHIKAWA  Seizo ONOE  Yoshinobu NAKAMURA  Masao NAKAGAWA  

     
    PAPER

      Vol:
    E82-A No:12
      Page(s):
    2697-2705

    While higher chip rate can provide better performance for Direct Sequence/Code Division Multiple Access (DS/CDMA) systems due to larger process gain, it may also induce spectrum emission to adjacent channels, i. e. , adjacent channel interference. Especially, if different operators use adjacent channels in the same area with uncoordinated power levels, such interference becomes large, and excessively higher chip rate will decrease the efficiency of a system. In this context, this paper evaluates the relation between chip rate and capacity in DS/CDMA cellular communication systems considering adjacent channel interference from other systems. First, the classification of adjacent channel interference between two independent DS/CDMA systems is described, and the concrete interference levels are calculated for several chip rates. Then, by using computer simulation, the system CDMA capacity is evaluated under adjacent channel interference. From these results, we can find that the excessively higher chip rate can not always provide the larger system CDMA capacity in spite of the larger process gain, and there exists the appropriate chip rate for a certain given bandwidth.