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Kiyoshi KOHIYAMA Kota OTSUBO Hidenaga TAKAHASHI Kiyotaka OGAWA Yukio OTOBE
Development of low power MUSE (Multiple Sub-Nyquist Sampling Encoding) chip set through reduction in operating voltage (from 5 V to 3.7 V) is described. This leads to great cost reduction since the chips could be mounted on low cost plastic packages and the necessity for cooling fans to dissipate heat was obviated. To maintain compatibility with standard 5 V analog and digital peripherals such as 4 Mbit DRAMs and an A/D converter, a special voltage-level converter was also developed.
Peilin LIU Li JIANG Hiroshi NAKAYAMA Toshiyuki YOSHITAKE Hiroshi KOMAZAKI Yasuhiro WATANABE Hisakatsu ARAKI Kiyonori MORIOKA Shinhaeng LEE Hajime KUBOSAWA Yukio OTOBE
We have developed a low-power, high-performance MPEG-4 codec LSI for mobile video applications. This codec LSI is capable of up to CIF 30-fps encoding, making it suitable for various visual applications. The measured power consumption of the codec core was 9 mW for QCIF 15-fps codec operation and 38 mW for CIF 30-fps encoding. To provide an error-robust MPEG-4 codec, we implemented an error-resilience function in the LSI. We describe the techniques that have enabled low power consumption and high performance and discuss our test results.