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Hideaki NAKANE Yutaka HARADA Kunio YAMASHITA Shinichiro YANO Mikio HIRANO Ushio KAWABE
The prototype of a newly proposed ac-powered Josephson Programmable Logic Array (JPLA) has been fabricated and experimentally investigated. The JPLA can operate more than 10 times as fast as a semiconductor PLA and with one-thousandth of its power dissipation.
This article describes simulation study on SQUID applications for Single-Flux-Quantum(SFQ) Logic Circuits. Here, a SQUID is compatible to a Quantum Flux Parametorn (QFP). Several new circuits based on a SQUID are investigated. A cascaded SQUID is proposed with the signal amplitude in the same order of an SFQ. An SFQ-pulse driving circuits with the new SQUID are successfully simulated. An SFQ trap which catches SFQs is newly proposed. Focusing on a circulating current of a segment in a Josephson transmission line (JTL), an SFQ-pulse is non-destructively detected by a SQUID. A conventional SQUID inserted in a JTL operates as a gate which controls SFQ-pulse transmission through it. Compatibility of SQUIDs and SFQ circuits is demonstrated.
Yutaka HARADA Hideaki NAKANE Nobuo KOTERA Mikio HIRANO
A newly developed current injection logic circuit is described. Input signal currents are directly injected into the inductor of a Josephson interferometer instead of being magnetically coupled to it. This circuit realizes excellent isolation characteristics between input and output signals. The additional offset-bias circuit increases the drivability and extends the operating margin. Experimental circuits forming cascade chains of 100 gates were fabricated using 10 µm-square lead-alloy Josephson junctions. The measured switching delay time was about 30 ps at a power dissipation of 15 µW.
Yutaka HARADA Yuji HATANO Kunio YAMASHITA Mikio HIRANO Ushio KAWABE
A newly developed Josephson logic gate array is described. This gate array has 576 switching devices (Josephson Interferometers) and it has attained the high speed switching time of 33ps with a 2-input OR circuit. Employing and AC-powered latch circuit, the gate array has a single power supply. The total power dissipation of the gate array chip has been estimated to be 2 mW. This gate array includes all the necessary types of function blocks to accommodate any kinds of computer logics. Shift-resistor and 4-bit full-adder circuits have been successfully operated.
Yutaka HARADA Nobuo KOTERA Ushio KAWABE
A DC-powered complementary circuit employing interferometers in investigated using simulation. It is shown that an output inductor and two kinds of damping resistors are necessary to suppress circuit oscillations. Switching speed is expected to be less than 25 ps at a current density of 5000 A/cm2 for lead-alloy devices.