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[Keyword] ATM (Asynchronous Transfer Mode)(7hit)

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  • A Combination Scheme of ARQ and FEC for Multimedia Wireless ATM Networks

    Doo Seop EOM  Masashi SUGANO  Masayuki MURATA  Hideo MIYAHARA  

     
    PAPER-QoS Control

      Vol:
    E81-B No:5
      Page(s):
    1016-1024

    In the wireless ATM network, the key issue is to guarantee various QoS (Quality of Service) under the conditions of the limited radio link bandwidth and error prone characteristics. In this paper, we show a combination method of the error correction schemes, which is suitable to establish multimedia wireless ATM Networks while keeping an efficient use of the limited bandwidth. We consider two levels of FEC; a bit-level and a cell-level to guarantee cell loss probabilities of real time applications. By combining two levels of FEC, various requirements on cell loss can be met. We then apply the bit-level FEC and ARQ protocol for the data communication; tolerant to the delay characteristics. Through the analytical methods, the required overheads of FECs are examined to satisfy the various QoS requirements of CBR connections. The mean delay analysis for the UBR service class is also presented. In numerical examples, we show how the combination scheme to guarantee various cell loss requirements affects the call blocking probability of the CBR service class and the delay of UBR service class.

  • Performance Comparisons of Approaches for Providing Connectionless Service over ATM Networks

    Doo Seop EOM  Masayuki MURATA  Hideo MIYAHARA  

     
    PAPER-Communication protocol

      Vol:
    E80-B No:10
      Page(s):
    1454-1465

    Connectionless data from existing network applications compose a large portion of the workload during an early ATM deployment, and are likely to make up an important portion of ATM's workload even in the long term. For providing a connectionless service over the ATM network, we compare two approaches; an indirect and a direct approaches, which are adopted by International Telecommunication Union-Telecommunication (ITU-T) as generic approaches. Our main subject of this paper is to compare network costs of two approaches by taking into account several cost factors such as transmission links, buffers, and connectionless servers in the case of the direct approach. Since the cost of the direct approach heavily depends on the configuration of a virtual connectionless overlay network, we propose a new heuristic algorithm to construct an effective connectionless overlay network topology. The proposed algorithm determines an optimal number of connectionless servers and their locations to minimize the network cost while satisfying QoS requirements such as maximum delay time and packet loss probability. Through numerical examples, we compare the indirect and direct approaches, the latter of which is constructed by means of our proposed algorithm.

  • HCR (Hybrid Cycle Reset) Protocol for Distributed High-Speed Multimedia Applications

    Sun-Moo KANG  Byung-Chun JEON  Dae-Young KIM  

     
    PAPER

      Vol:
    E80-A No:6
      Page(s):
    1062-1068

    This paper discribes a shared medium access control protocol for residential home and small business customer ATM network application with distributed high-speed multimedia services. This protocol offers global fairness for the whole network with a CG (Centralized Grant) signal and, at the same time, offers local fairness between nodes with DG (Distributed Grant) signals. The DG signal is only meaningful to the next neighboring node. The local fairness is kept between two nodes in distributed way, but this distributed local fairness helps to keep the global fairness. Because the DG signal is related to the passed DG signal from the neighbor node. This protocol is rather simple but shows high performance than the already announced protocols.

  • CDV Reduction Shaping Algorithm in ATM Networks

    Kan TOYOSHIMA  

     
    LETTER-Communication Networks and Services

      Vol:
    E79-B No:4
      Page(s):
    602-604

    This letter proposes a new shaping algorithm (CRSA: CDV Reduction Shaping Algorithm) that can freely reduce the maximum CDV value of a cell stream to any predetermined value. There is a trade off between shaping delay and the maximum CDV value reduction achieved when using CRSA. The shaper using CRSA (CR-shaper) output satisfies the Peak Cell Rate Reference Algorithm set with the CR-shaper parameters.

  • LAN Internetworking through Broadband ISDN

    Masayuki MURATA  Hideo MIYAHARA  

     
    INVITED PAPER

      Vol:
    E77-B No:3
      Page(s):
    294-305

    A local area network (LAN) can now provide high-speed data communications in a local area environment to establish distributed processing among personal computers and workstations, and the need for interconnecting LANs, which are geographically distributed, is naturally arising. Asynchronous Transfer Mode (ATM) technology has been widely recognized as a promising way to provide the high-speed wide area networks (WAN) for Broadband Integrated Services Digital Network (B-ISDN), and the commercial service offerings are expected in the near future. The ATM network seems to have a capability as a backbone network for interconnecting LANs, and the LAN interconnection is expected to be the first service in ATM networks. However, there remain some technical challenges for this purpose; one of the main difficulties in LAN interconnection is the support of connectionless traffic by the ATM network, which is basically a connection-oriented network. Another one is the way of achieving the very high-speed data transmission over the ATM network. In this paper, we first discuss a LAN internetworking methodology based on the current technology. Then, the recent deployments of LAN interconnection methods through B-ISDN are reviewed.

  • ATM Transport with Dynamic Capacity Control for Interconnection of Private Networks

    Katsuyuki YAMAZAKI  Yasushi WAKAHARA  

     
    PAPER

      Vol:
    E77-B No:3
      Page(s):
    327-334

    This paper deals with methods for interconnection between two local private networks that are geographically separated. A scheme is first presented to chain low bit-rate physical circuits into one logical circuit, over which ATM cells are transmitted as if there is one circuit with a high bit-rate capacity. In particular, use of existing low bit-rate circuits, e.g., 384/1536 kbit/s PDH leased line services and N-ISDN switched channels, is considered. The paper discusses two methods to permit chaining of physical circuits, and identifies their advantages and applications. By using the ATM-based circuit-chaining method, dynamic capacity control of the interconnection is then introduced with the use of an ATM-based rate adaptation. This is intended to provide a flexible and cost-effective capacity control compared to the existing TDM-based control. It is also possible to realize non-stop operation of changing capacity by establishment and release of chained circuits, which will lead to high reliability and robustness of private networks. Finally, delay characteristics introduced by the method are evaluated based on a computer simulation which gives a short and acceptable delay.

  • Circuit Emulation Technique in ATM Networks

    Changhwan OH  Masayuki MURATA  Hideo MIYAHARA  

     
    PAPER-Communication Networks and Service

      Vol:
    E76-B No:6
      Page(s):
    646-657

    A circuit emulation technique in the ATM network becomes necessary to guarantee user requirements similar to QOS grade offered by STM network where small bit error rates and constant delay times are offered. The Head-Of-Line method or other priority control schemes may be considered to provide such service in the ATM network, while it is known to give too inferior quality to non-circuit emulation service traffic. In this paper, we propose a new method called a periodical bandwidth allocation method for the circuit emulation technique. The cells of circuit emulation service traffic are transmitted periodically in our proposal. A periodical interval is determined from both the length of limit delay time of circuit emulation traffic in each switching node and the number of cell arrivals during the limit delay time. To evaluate our method, we consider three kinds of arrival patterns (the best case, the moderate case, and the worst case) for the circuit emulation traffic and a two-state MMPP for modeling the non-circuit emulation traffic. We show performance results in terms of the cell loss probability and the mean delay time in our proposal through analytic and simulation approaches.