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[Keyword] BPC permutation(3hit)

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  • A realization of an arbitrary BPC Permutation in Hypercube Connected Computer Networks

    Hiroshi MASUYARA  Yuichiro MORITA  Etsuko MASUYAMA  

     
    PAPER-Computer Networks

      Vol:
    E78-D No:4
      Page(s):
    428-435

    A multiple instruction stream-multiple data stream (MIMD) computer is a parallel computer consisting of a large number of identical processing elements. The essential feature that distinguishes one MIMD computer family from another is the interconnection network. In this paper, we are concerned with a representative type of interconnection networks: the hypercube connected network. A family of regular graphs is presented as a possible candidate for the implementation of a distributed system and for fault-tolerant architectures. The symmetry of graphs makes it possible to determine message routing by using a simple distributed algorithm. A candidate having the same property is the hypercube connected network. Arbitrary data permutations are generally accomplished by sorting. For certain classes of permutations, however, this is, for many frequently used permutations in parallel processing such as bit reversal, bit shuffle, bit complement, matrix transpose, butterfly permutations used in FFT algorithms, and segment shuffles, there exist algorithms that are more efficient than the best sorting algorithm. One such class is the bit permute complement (BPC) class of permutations. In this paper, we, first, develop an algorithm to realize an arbitrary BPC permutation in hypercube connected networks. The developed algorithm in hypercube connected networks requires only 1 token memory register in each node. We next evaluate the ability to realize BPC permutations in these networks of an arbitrary size by estimating the number of required routing steps.

  • Algorithms to Realize an Arbitrary BPC Permutation in Chordal Ring Networks and Mesh Connected Networks

    Hiroshi MASUYAMA  

     
    PAPER-Software Theory

      Vol:
    E77-D No:10
      Page(s):
    1118-1129

    A multiple instruction stream-multiple data stream (MIMD) computer is a parallel computer consisting of a large number of identical processing elements. The essential feature that distinguishes one MIMD computer family from another is the interconnection network. In this paper, 2 representative types of interconnection networks are dealt with the chordal ring network and the mesh connected network. A family of regular graphs of degree 3, called chordal rings is presented as a possible candidate for the implementation of a distributed system and for fault-tolerant architectures. The symmetry of graphs makes it possible to determine message routing by using a simple distributed algorithm. Another candidate having the same property is the mesh connected networks. Arbitrary data permutations are generally accomplished by sorting. For certain classes of permutations, however, there exist algorithms that are more efficient than the best sorting algorithm. One such class is the bit permute complement (BPC) class of permutations. The class of BPC permutations includes many of the frequently occurring permutations such as bit reversal, bit shuffle, bit complement, matrix transpose, etc. In this paper, we evaluate the abilities of the above networks to realize BPC permutations. In this paper, we, first, develop algorithms required 2 token storage registers in each node to realize an arbitrary BPC permutaion in both chordal ring networks and mesh connected networks. We next evaluate the ability to realize BPC permutations in these networks of an arbitrary size by estimating the number of required routing steps.

  • Fault Tolerant Routing for Realization of BPC Permutations in Delta Networks

    Hiroshi MASUYAMA  Yuichirou MORITA  Hiroyuki OKADA  

     
    PAPER-Computer Networks

      Vol:
    E75-D No:4
      Page(s):
    557-568

    The numbers of passes required to realize permutations in the class of Bit Permute-Complement (BPC) permutations such as Bit-Reversal, Matrix-Transpose, Perfect-Shuffle, and Bit-Complement permutations in delta and extrastage delta networks are obtained. The influence of the faults in the networks on the number of passes required for them is also investigated. First, how different are the time complexities required when using a route decision algorithm and an improved algorithm having taken some inherent properties into consideration is discussed and solved by obtaining real data. Next, how many passes are required to realize BPC permutations in delta networks when faults are present and when not present, and how many passes can be reduced by using an extra-stage are discussed continuously. As an important criterion for the fault tolerance of multistage interconnecting networks, Dynamic Full Access (DFA) has been suggested. A weakness of DFA as applied to BPC permutations is that the ability to realize such permutations in a finite number of passes can not be always measured by a criterion of DFA, because of the uneven distributions of paths required for the permutations. This reason suggests the ability to realize such permutations must be investigated from the different angle.