The correct detection of the start of burst is very important in wideband networking radio operation as it directly affects the Time Division Multiple Access (TDMA) adaptive time slot algorithm. In this paper, we propose a robust Data Aided (DA) algorithm for burst detection in a hybrid CDMA/Adaptive TDMA based wideband networking waveform of a software defined radio. The proposed algorithm is based on a novel differentially modulated training sequence designed by using precoding sequence. The training sequence structure and precoding sequence are exploited in the calculation of proposed timing metric which is normalized by the signal energy. The precoding sequence is adequately designed for the timing metric to have a sharp peak. The algorithm shows excellent performance for multiuser scenario. It is shown through computer simulations that by increasing the active users from 1 to 8, the performance degradation is only about 1∼2dB. The proposed algorithm is compared with other algorithms and found to outperform them even in the presence of multipath fading effects. The proposed algorithm has been implemented on Field Programmable Gate Array (FPGA) platform for high data rate applications and it is shown that the results from hardware are identical to the simulation results.

In this paper, we propose a novel Carrier Frequency Offset (CFO) estimation and compensation algorithm applicable to Software Defined Radio (SDR). A two stage estimation algorithm has been proposed as a concatenation of two algorithms namely Modified Maximum Likelihood Data Aided (MMLDA) coarse frequency estimation and sample by sample residual CFO estimation. The second stage tracks the residual offset on sample by sample basis for the whole burst without using preamble. Simulation results are given for Stanford University Interim (SUI) channels to demonstrate the effectiveness of the proposed algorithm in multipath fading channel. The proposed algorithm shows better performance than the conventional two stage algorithms, even for large frequency offsets. The proposed algorithm has been implemented in software on TMS320C64x+ Digital Signal Processor (DSP) core and verified by comparing with simulation results.