Reference current used in sense amplifiers is a crucial factor in a single-end read manner for emerging memories. Dummy cell average read scheme uses multiple pairs of dummy cells inside the array to generate an accurate reference current for data sensing. The previous research adopts current mirror sense amplifier (CMSA) which is compatible with the dummy cell average read scheme. However, clamped bit-line sense amplifier (CBLSA) has higher sensing speed and lower power consumption compared with CMSA. Therefore, applying CBLSA to dummy cell average read scheme is expected to enhance the performance. This paper reveals that direct combination of CBLSA and dummy cell average read scheme leads to sense margin degradation. In order to solve this problem, a new array design is proposed to make CBLSA compatible with dummy cell average read scheme. Current mirror structure is employed to prevent CBLSA from being short-circuited directly. The simulation result shows that the minimum sensible tunnel magnetoresistance ratio (TMRR) can be extended from 14.3% down to 1%. The access speed of the proposed sensing scheme is less than 2 ns when TMRR is 70% or larger, which is about twice higher than the previous research. And this circuit design just consumes half of the energy in one read cycle compared with the previous research. In the proposed array architecture, all the dummy cells can be always short-circuited in totally isolated area by low-resistance metal wiring instead of using controlling transistors. This structure is able to contribute to increasing the dummy cell averaging effect. Besides, the array-level simulation validates that the array design is accessible to every data cell. This design is generally applicable to any kinds of resistance-variable emerging memories including STT-MRAM.

Design of high gain and high efficiency antennas is one of the key challenges in antenna engineering and especially in millimeter wave communication systems. Various types of planar waveguide arrays with series-fed traveling wave operation have been developed in Tokyo Tech with the special focus upon efficiency enhancement as well as reduction of fabrication cost. In this review, four kinds of single layer waveguide arrays characterized with the series fed travelling wave operation are surveyed first. To cope with the bandwidth narrowing effects due to long line effects associated with the series fed operation, authors have introduced partially corporate feed embedded in the single layer waveguide. They further extended the study to cover fully corporate feed arrays with multiple layer waveguide as well; a new fabrication technique of diffusion bonding of laminated thin plates has the potential to realize the low cost mass production of multi-layer structures for the millimeter wave application. Secondly, the novel methods for loss evaluation of copper plate substrate are established for the design of post-wall waveguide arrays where dielectric loss and conductor loss is determined in wide range of millimeter wave band, by using the Whispering gallery mode resonator. This enables us to design the planar arrays with the loss taken into account. Finally, the planar arrays are now applied to two kinds of systems in the Tokyo Tech millimeter wave project; the indoor short range file-transfer systems and the outdoor communication systems for the medium range backhaul links. The latter has been field-tested in the model network built in Tokyo Tech Ookayama campus. Early stage progress of the project including unique propagation data is also reported.