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[Keyword] circuit-switched network(3hit)

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  • Improving the Performance of Circuit-Switched Interconnection Network for a Multi-FPGA System

    Kohei ITO  Kensuke IIZUKA  Kazuei HIRONAKA  Yao HU  Michihiro KOIBUCHI  Hideharu AMANO  

     
    PAPER

      Pubricized:
    2021/08/05
      Vol:
    E104-D No:12
      Page(s):
    2029-2039

    Multi-FPGA systems have gained attention because of their high performance and power efficiency. A multi-FPGA system called Flow-in-Cloud (FiC) is currently being developed as an accelerator of multi-access edge computing (MEC). FiC consists of multiple mid-range FPGAs tightly connected by high-speed serial links. Since time-critical jobs are assumed in MEC, a circuit-switched network with static time-division multiplexing (STDM) switches has been implemented on FiC. This paper investigates techniques of enhancing the interconnection performance of FiC. Unlike switching fabrics for Network on Chips or parallel machines, economical multi-FPGA systems, such as FiC, use Xilinx Aurora IP and FireFly cables with multiple lanes. We adopted the link aggregation and the slot distribution for using multiple lanes. To mitigate the bottleneck between an STDM switch and user logic, we also propose a multi-ejection STDM switch. We evaluated various combinations of our techniques by using three practical applications on an FiC prototype with 24 boards. When the number of slots is large and transferred data size is small, the slot distribution was sometimes more effective, while the link aggregation was superior for other most cases. Our multi-ejection STDM switch mitigated the bottleneck in ejection ports and successfully reduced the number of time slots. As a result, by combining the link aggregation and multi-ejection STDM switch, communication performance improved up to 7.50 times with few additional resources. Although the performance of the fast Fourier transform with the highest communication ratio could not be enhanced by using multiple boards when a lane was used, 1.99 times performance improvement was achieved by using 8 boards with four lanes and our multi-ejection switch compared with a board.

  • A Model for Stream Overflows in Circuit-Switched Communication Networks

    Ramesh BHANDARI  

     
    PAPER-Network performance and traffic theory

      Vol:
    E80-B No:2
      Page(s):
    324-331

    In the design and analysis of circuit-switched alternate-routing networks a fundamental and important problem is the decomposition of the overflow traffic from a given trunk-group (or link) into its component traffic streams. Decomposition is required because the individual streams corresponding to different sources of traffic can in principle be routed to different links depending upon the routing algorithms. Because the exact solution of this problem is intractable, several approximate methods have been given in the past. However, these approximate methods yield either incomplete solutions or solutions that are not tractable enough to be implementable in today's large networks. In this paper, we describe a model which provides a complete solution for the individual streams overflowing a group of trunks when this group of trunks is offered a number of independent traffic streams with varying peakedness values (peakedness=variance/mean, where mean and variance are the first two moments of a given traffic stream (or distribution); these moments adequately describe a given traffic distribution for teletraffic calculations). The derived formulas are simple and easily implementable in algorithms for the design of today's networks which can require large amounts of computation.

  • Advanced Dimensioning Tool for Circuit-Switched Networks

    Masaaki SHINOHARA  

     
    PAPER

      Vol:
    E75-B No:7
      Page(s):
    594-600

    We have developed an advanced tool for dimensioning circuit-switched networks, called CNEP (Circuit-Switched Network Evaluation Program) , for effective design of digital networks. CNEP features a high-reliability network structure (node dispersion, double homing, etc) , both-way circuit operation, and circuit modularity (or big module size), all of which are critical for digital networks. CNEP also solves other dimensioning problems such as the cost difference between existing and newly installed circuits, and handles multi-hour traffic conditions, dynamic routing, and multiple-switching-unit nodes. Operations Research techniques are applied to produce exact and heuristic algorithms for these problems. Algorithms with good time-performance trade-off characteristics are chosen for CNEP.