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[Keyword] neural circuit(2hit)

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  • Self-Reconstruction of 3D Mesh Arrays with 1 1/2-Track Switches by Digital Neural Circuits

    Itsuo TAKANAMI  Satoru NAKAMURA  Tadayoshi HORITA  

     
    PAPER-Configurable Computing and Fault Tolerance

      Vol:
    E82-C No:9
      Page(s):
    1678-1686

    Using Hopfield-type neural network model, we present an algorithm for reconstructing 3D mesh processor arrays using single-track switches where spare processors are laid on the six surfaces of a 3D array and show its effectiveness in terms of reconstruction rate and computing time by computer simulation. Next, we show how the algorithm can be realized by a digital neural circuit. It consists of subcircuits for finding candidate compensation paths, deciding whether the neural system reaches a stable state and at the time the system energy is minimum, and subcircuits for neurons. The subcircuit for each neuron including the other subcircuits can only be made with 16 gates and two flip-flops. Since the state transitions are done in parallel, the circuit will be able to find a set of compensation paths for a fault pattern very quickly within a time less than 1 µs. Furthermore, the hardware implementation of the algorithm leads to making a self-reconfigurable system without the aid of a host computer.

  • Modular Circuitry and Network Dynamics for the Formation of Visuospatial Working Memory in the Primate Prefrontal Cortex

    Shoji TANAKA  Shuhei OKADA  

     
    PAPER-Neural Networks

      Vol:
    E82-A No:4
      Page(s):
    688-699

    A model of the prefrontal cortical circuit has been constructed to investigate the dynamics for working memory processing. The model circuit is multi-layered and consists of a number of circuit modules or columns, each of which has local, excitatory and inhibitory connections as well as feedback connections. The columns interact with each other via the long-range horizontal connections. Besides these intrinsic connections, the pyramidal and spiny cells in the superficial layers receive the specific cue-related input and all the cortical neurons receive a hypothetical bias input. The model cortical circuit amplifies the response to the transient, cue-related input. The dynamics of the circuit evolves autonomously after the termination of the input. As a result, the circuit reaches in several hundred milliseconds an equilibrium state, in which the neurons exhibit graded-level, sustained activity. The sustained activity varies gradually with the cue direction, thus forming memory fields. In the formation of the memory fields, the feedback connections, the horizontal connections, and the bias input all play important roles. Varying the level of the bias input dramatically changes the dynamics of the model cortical neurons. The computer simulations show that there is an optimum level of the input for the formation of well-defined memory fields during the delay period.