The search functionality is under construction.
The search functionality is under construction.

Keyword Search Result

[Keyword] packet switching(25hit)

21-25hit(25hit)

  • Enhanced Synchronous Packet Switching for IP Packets

    Peter HOMAN  Janez BESTER  

     
    PAPER-Switching

      Vol:
    E85-B No:1
      Page(s):
    247-256

    Fast packet switches for variable-size packets have become an everyday necessity with the rapid growth in the volume of Internet traffic. Such switches can be designed in two different ways, either by segmenting packets into smaller fixed-size cells and designing packet switches for such cells, or by designing generic packet switches for variable-size packets, where packet segmentation and reassembly can be omitted. The second option is investigated in this paper. The synchronous operation mode with time-limited bulk service is selected. The switching fabric is assumed to be internally non-blocking and provided with input queues. A previous maximum switch throughput analysis has been done under the assumption that the length of the time slot is fixed set to its minimum allowed value (Tmin). In this work, a so-called time-slot stretch factor (SF) is introduced. The actual time-slot length is determined by multiplying Tmin with the SF, where SF. Next, a so-called Internet traffic-source model is proposed based on findings from real IP traffic measurements. The performance implications of the proposed time-slot length modification are analyzed by discrete-event computer simulation. The maximum switch throughput is increased by increasing the SF value, e.g. for uniform packet size distribution and SF=10, the maximum switch throughput is increased from 75% to 97%. The influence of the traffic-source characteristics on the maximum switch throughput is decreased when SF value is increased. In order to prevent any possible throughput degradations, it is advisable to use integer SF values. Packet delay analysis has revealed that by increasing the SF value, the mean packet delay is also increased. Nevertheless, it is shown that the number of switch input and output ports is the most important factor to be considered when packet delay is at stake. Service class differentiation inside investigated packet switch is possible and is not affected by the increasing SF value. Such a packet switch is suitable for implementation in wide area networks, due to high transmission speeds and the small number of switch ports.

  • Photonic Packet Switching: An Overview

    Rodney S. TUCKER  Wen De ZHONG  

     
    INVITED PAPER-Packet and ATM Switching

      Vol:
    E82-B No:2
      Page(s):
    254-264

    The application of photonic technologies to packet switching offers the potential of very large switch capacity in the terabit per second range. The merging of packet switching with photonic technologies opens up the possibility of packet switching in transparent photonic media, in which packets remain in optical form without undergoing optoelectronic conversion. This paper reviews recent work on photonic packet switching. Different approaches to photonic packet switching and key design issues are discussed.

  • Photonic Packet Switching: An Overview

    Rodney S. TUCKER  Wen De ZHONG  

     
    INVITED PAPER-Packet and ATM Switching

      Vol:
    E82-C No:2
      Page(s):
    202-212

    The application of photonic technologies to packet switching offers the potential of very large switch capacity in the terabit per second range. The merging of packet switching with photonic technologies opens up the possibility of packet switching in transparent photonic media, in which packets remain in optical form without undergoing optoelectronic conversion. This paper reviews recent work on photonic packet switching. Different approaches to photonic packet switching and key design issues are discussed.

  • Data Traffic Control and Capacity Evaluations for Voice/Data Integrated Transmission in DS-CDMA

    Minami NAGATSUKA  Yoshihiro ISHIKAWA  Shinji UEBAYASHI  

     
    PAPER

      Vol:
    E81-B No:7
      Page(s):
    1355-1364

    The next generation mobile communications systems must support multimedia communications services as well as conventional voice service. DS-CDMA is regarded as the most promising candidate, because it is indispensable to cope with multimedia. The system capacity of DS-CDMA system is limited by the total interference level. As a result, in DS-CDMA systems many users suffer very poor communication quality if the total interference level exceeds this limit. Therefore, this paper considers smoothing interference fluctuation using the difference between voice and data in a type of QoS (quality of service). In other words, voice communication is suitable for a loss system because the quality of voice communication is delay-sensitive. On the other hand, data communication is suitable for a waiting system because the quality of data communication is non-delay-sensitive. This paper focuses on a system that applies a circuit switching method for voice traffic and a reservation type packet switching method for data traffic and proposes a data traffic control method. In this proposed data traffic control method, a base station controls data transmission from a mobile station to utilize unused voice traffic resources. As a result, the proposed method achieves highly efficient use of the radio spectra by smoothing interference fluctuation in DS-CDMA systems. This paper evaluates the performance level of the proposed method from a system capacity standpoint. It is shown that the proposed method achieves higher system capacity in voice/data integrated transmission.

  • Integrated Switching Architecture and Its Traffic Handling Capacity in Data Communication Networks

    Noriharu MIYAHO  Akira MIURA  

     
    PAPER-Communication Systems and Transmission Equipment

      Vol:
    E79-B No:12
      Page(s):
    1887-1899

    A mechanism of an integrated switching system architecture where PS, CS, and ATM switching functions are integrated based on a hierarchical memory system concept is discussed. A packet buffering control mechanism, and practical random time-slot assignment mechanism for CS traffic, which are composed of multiple bearer rate data traffic are then described. The feasibility of the random time-slot assignment mechanism is also confirmed by a practical experimental system using VLSI technology, particularly, content addressable memory (CAM) technology. The required queuing delay between the nodes for the corresponding call set up procedure is also shown and its application is clarified. For practical digital networks that provide various types of data communications including voice, data, and video services, it is highly desirable to evaluate the transmission efficiency of integrating packet switching (PS) type non-real time traffic and circuit switching (CS) type real time traffic. Transmission line utilization improvement is expected when the random time-slot assignment and the movable boundary scheme on a TDM (Time Division Multiplexing) data frame are adopted. The corresponding control procedure by signaling between switching nodes is also examined.

21-25hit(25hit)